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    Stackable memory device and organic transistor structure
    4.
    发明申请
    Stackable memory device and organic transistor structure 审中-公开
    可堆叠存储器件和有机晶体管结构

    公开(公告)号：US20070007510A1

    公开(公告)日：2007-01-11

    申请号：US11174881

    申请日：2005-07-05

    申请人： Igor Sokolik ,  Suzette Pangrle ,  Juri Krieger

    发明人： Igor Sokolik ,  Suzette Pangrle ,  Juri Krieger

    IPC分类号： H01L29/08

    CPC分类号： H01L51/0541 ,  H01L27/0688 ,  H01L27/281 ,  H01L27/283

    摘要： In the present electronic structure, a first electronic device includes a first pair of electrodes and an active layer between the first pair of electrodes. An organic transistor is made up of organic material, a source, a drain, and a gate, one of the first pair of electrodes being connected to one of the source and drain of the organic transistor. A second electronic device includes a second pair of electrodes and an active layer between the second pair of electrodes, one of the second pair of electrodes being in contact with an insulating body adjacent the organic transistor.

    摘要翻译： 在本电子结构中，第一电子器件包括第一对电极和第一对电极之间的有源层。 有机晶体管由有机材料，源极，漏极和栅极组成，第一对电极之一连接到有机晶体管的源极和漏极之一。 第二电子器件包括第二对电极和在第二对电极之间的有源层，第二对电极中的一个与邻近有机晶体管的绝缘体接触。

    Memory element using active layer of blended materials
    5.
    发明授权
    Memory element using active layer of blended materials 有权
    记忆元素使用有源层的混合材料

    公开(公告)号：US07378682B2

    公开(公告)日：2008-05-27

    申请号：US11052688

    申请日：2005-02-07

    申请人： David Gaun ,  Swaroop Kaza ,  Stuart Spitzer ,  Juri Krieger ,  Richard Kingsborough

    发明人： David Gaun ,  Swaroop Kaza ,  Stuart Spitzer ,  Juri Krieger ,  Richard Kingsborough

    IPC分类号： H01L51/00

    CPC分类号： H01L27/285 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016

    摘要： The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive layer and second electrode, for receiving a charged specie from the passive layer. The active layer is a mixture of (i) a first polymer, and (ii) a second polymer for enhancing ion transport, improving the interface and promoting a rapid and substantially uniform distribution of the charged specie in the active layer, i.e., preventing a localized injection of the charged species. These features result in a memory element with improved stability, a more controllable ON-state resistance, improved switching speed and a lower programming voltage.

    摘要翻译： 本存储器件具有第一和第二电极，在第一和第二电极之间并且与第一电极接触并且与第一电极接触的无源层以及在第一和第二电极之间并且与被动层和第二电极接触的有源层 电极，用于从被动层接收带电物质。 活性层是（i）第一聚合物和（ii）用于增强离子迁移的第二聚合物的混合物，改善界面并促进活性层中带电物质的快速且基本上均匀的分布，即防止 局部注射带电物种。 这些特征导致存储元件具有改进的稳定性，更可控的导通电阻，改进的开关速度和较低的编程电压。

    Memory element using active layer of blended materials
    6.
    发明申请
    Memory element using active layer of blended materials 有权
    记忆元素使用有源层的混合材料

    公开(公告)号：US20060175646A1

    公开(公告)日：2006-08-10

    申请号：US11052688

    申请日：2005-02-07

    申请人： David Gaun ,  Swaroop Kaza ,  Stuart Spitzer ,  Juri Krieger ,  Richard Kingsborough

    发明人： David Gaun ,  Swaroop Kaza ,  Stuart Spitzer ,  Juri Krieger ,  Richard Kingsborough

    IPC分类号： H01L29/94

    CPC分类号： H01L27/285 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016

    摘要： The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive layer and second electrode, for receiving a charged specie from the passive layer. The active layer is a mixture of (i) a first polymer, and (ii) a second polymer for enhancing ion transport, improving the interface and promoting a rapid and substantially uniform distribution of the charged specie in the active layer, i.e., preventing a localized injection of the charged species. These features result in a memory element with improved stability, a more controllable ON-state resistance, improved switching speed and a lower programming voltage.

    摘要翻译： 本存储器件具有第一和第二电极，在第一和第二电极之间并且与第一电极接触并且与第一电极接触的无源层以及在第一和第二电极之间并且与被动层和第二电极接触的有源层 电极，用于从被动层接收带电物质。 活性层是（i）第一聚合物和（ii）用于增强离子迁移的第二聚合物的混合物，改善界面并促进活性层中带电物质的快速且基本上均匀的分布，即防止 局部注射带电物种。 这些特征导致存储元件具有改进的稳定性，更可控的导通电阻，改进的开关速度和较低的编程电压。

    Memory device with improved switching speed and data retention
    7.
    发明授权
    Memory device with improved switching speed and data retention 有权
    具有改进的开关速度和数据保持的存储器件

    公开(公告)号：US08274073B2

    公开(公告)日：2012-09-25

    申请号：US11078873

    申请日：2005-03-11

    申请人： Juri Krieger ,  Stuart Spitzer

    发明人： Juri Krieger ,  Stuart Spitzer

    IPC分类号： H01L29/08

    CPC分类号： H01L51/0595 ,  H01L27/285 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/148 ,  H01L51/0078

    摘要： The present memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the passive layer and the second electrode. In undertaking an operation on the memory device, ions moves into within and from within the active layer, and the active layer is oriented so that the atoms of the active layer provide minimum obstruction to the movement of the ions into, within and from the active layer.

    摘要翻译： 本存储器件包括第一和第二电极，第一和第二电极之间的无源层以及无源层和第二电极之间的有源层。 在对存储器件进行操作时，离子移动到有源层内部和从有源层内移动，并且有源层被定向成使得有源层的原子为离子进入活性层的活动提供了最小的阻碍， 层。

    Memory device including barrier layer for improved switching speed and data retention
    8.
    发明授权
    Memory device including barrier layer for improved switching speed and data retention 有权
    存储器件包括用于提高开关速度和数据保持的阻挡层

    公开(公告)号：US07154769B2

    公开(公告)日：2006-12-26

    申请号：US11052689

    申请日：2005-02-07

    申请人： Juri Krieger ,  Stuart Spitzer

    发明人： Juri Krieger ,  Stuart Spitzer

    IPC分类号： G11C11/00

    CPC分类号： H01L45/12 ,  G11C13/0009 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2213/51 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/146

    摘要： The present memory device includes a first electrode, a passive layer on and in contact with the first electrode, the passive layer including copper sulfide, a barrier layer on and in contact with the passive layer, an active layer on and in contact with the barrier layer, and a second electrode on and in contact with the active layer. The inclusion of the barrier layer in this environment increases switching speed of the memory device, while also improving data retention thereof.

    摘要翻译： 本存储器件包括第一电极，与第一电极接触并与第一电极接触的钝化层，钝化层包括硫化铜，与钝化层接触并与其接触的阻挡层，与屏障接触并与屏障接触的有源层 层，以及与活性层接触并与活性层接触的第二电极。 在该环境中包含阻挡层增加了存储器件的切换速度，同时也提高了其数据保持性。

    Systems and methods for adjusting programming thresholds of polymer memory cells
    10.
    发明申请
    Systems and methods for adjusting programming thresholds of polymer memory cells 有权
    用于调整聚合物存储器单元的编程阈值的系统和方法

    公开(公告)号：US20060038982A1

    公开(公告)日：2006-02-23

    申请号：US10919846

    申请日：2004-08-17

    申请人： Stuart Spitzer ,  Juri Krieger ,  David Gaun

    发明人： Stuart Spitzer ,  Juri Krieger ,  David Gaun

    IPC分类号： G01B1/00

    CPC分类号： G11C13/0016 ,  B82Y10/00 ,  G11C13/0009 ,  G11C13/0014 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/56

    摘要： Systems and methodologies are provided for adjusting threshold associated with a polymer memory cell's operation by applying thereupon a regulated electric field and/or voltage pulse width, during a post fabrication stage. Such customization of programming thresholds can typically be obtained at any cycle of programming the memory cell, to increase flexibility in circuit design. Accordingly, the present invention supplies both a current-voltage domain, and/or a frequency-time domain, to facilitate adjusting the program thresholds of the polymer memory cell.

    摘要翻译： 提供了系统和方法，用于通过在后制造阶段中施加调节的电场和/或电压脉冲宽度来调整与聚合物存储器单元的操作相关联的阈值。 编程阈值的定制通常可以在编程存储器单元的任何周期中获得，以增加电路设计的灵活性。 因此，本发明提供电流 - 电压域和/或频率 - 时域，以便于调整聚合物存储单元的程序阈值。