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    Semiconductor integrated circuit devices having contacts formed of single-crystal materials
    3.
    发明授权
    Semiconductor integrated circuit devices having contacts formed of single-crystal materials 有权
    具有由单晶材料形成的触点的半导体集成电路器件

    公开(公告)号：US08053831B2

    公开(公告)日：2011-11-08

    申请号：US12154046

    申请日：2008-05-20

    申请人： Man-Jong Yu

    发明人： Man-Jong Yu

    IPC分类号： H01L29/66

    CPC分类号： H01L27/10888 ,  H01L21/28525 ,  H01L27/10876 ,  H01L27/10894 ,  Y10S257/905 ,  Y10S257/906 ,  Y10S257/907 ,  Y10S257/908

    摘要： A memory cell of memory device, comprises an active region of a memory cell defined in a semiconductor substrate, and a conductive gate electrode in a trench of the active region. The gate electrode is isolated from the semiconductor substrate. An insulation layer is on the active region and on the conductive gate electrode. A conductive contact is in the insulation layer on the active region at a side of the gate electrode and isolated from the gate electrode. The contact has a first width at a top portion thereof and a second width at a bottom portion thereof, the first width being greater than the second width. The contact is formed of a single-crystal material.

    摘要翻译： 存储器件的存储单元包括限定在半导体衬底中的存储单元的有源区和在有源区的沟槽中的导电栅电极。 栅电极与半导体衬底隔离。 绝缘层位于有源区和导电栅电极上。 导电接触位于栅电极一侧的有源区上的绝缘层中，并与栅电极隔离。 接触件在其顶部具有第一宽度，在其底部具有第二宽度，第一宽度大于第二宽度。 接触由单晶材料形成。

    Error detection/correction method
    4.
    发明授权
    Error detection/correction method 失效
    误差检测/校正方法

    公开(公告)号：US07634707B2

    公开(公告)日：2009-12-15

    申请号：US10800382

    申请日：2004-03-11

    申请人： Wingyu Leung ,  Fu-Chieh Hsu

    发明人： Wingyu Leung ,  Fu-Chieh Hsu

    IPC分类号： H03M13/00 ,  G11C29/00

    CPC分类号： H04L25/0272 ,  G06F11/006 ,  G06F11/10 ,  G06F11/1032 ,  G06F11/2007 ,  G06F12/0661 ,  G06F13/4077 ,  G11C5/04 ,  G11C29/006 ,  G11C29/08 ,  G11C29/48 ,  G11C29/76 ,  G11C29/808 ,  G11C29/81 ,  G11C29/832 ,  G11C29/88 ,  G11C2029/0401 ,  G11C2029/0411 ,  G11C2029/4402 ,  H01L22/22 ,  H01L27/0203 ,  H04L5/1461 ,  H04L25/026 ,  H04L25/028 ,  H04L25/029 ,  H04L25/0292 ,  Y10S257/907

    摘要： A method for error detection and correction (EDC) includes: generating a complete EDC code in response to a data packet; distributing the complete EDC code among the data packet to create a plurality of bytes, each including a data portion from the data packet and an EDC code portion from the complete EDC code; storing the bytes in a memory module; retrieving the bytes from the memory module; forwarding the data portions of the bytes retrieved from the memory module to a requesting device; providing the data portions of the bytes retrieved from the memory module to an EDC functional block; providing the EDC code portions of the bytes retrieved from the memory module to the EDC functional block; and performing error checking and correction in the EDC functional block upon receiving the complete EDC code from the provided EDC code portions.

    摘要翻译： 一种用于错误检测和校正（EDC）的方法包括：响应于数据包产生完整的EDC码; 在数据分组中分发完整的EDC代码以创建多个字节，每个字节包括来自数据分组的数据部分和来自完整EDC代码的EDC代码部分; 将字节存储在存储器模块中; 从存储器模块检索字节; 将从存储器模块检索的字节的数据部分转发到请求设备; 将从存储器模块检索的字节的数据部分提供给EDC功能块; 将从存储器模块检索的字节的EDC代码部分提供给EDC功能块; 并且在从所提供的EDC代码部分接收到完整的EDC代码时，在EDC功能块中执行错误校验和校正。

    Semiconductor device
    6.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07541616B2

    公开(公告)日：2009-06-02

    申请号：US11975862

    申请日：2007-10-22

    申请人： Pierre Fazan ,  Serguei Okhonin

    发明人： Pierre Fazan ,  Serguei Okhonin

    IPC分类号： H01L31/112

    CPC分类号： H01L27/108 ,  G11C11/403 ,  G11C11/404 ,  G11C11/5621 ,  G11C2211/4016 ,  H01L21/84 ,  H01L27/10802 ,  H01L27/10844 ,  H01L27/1203 ,  H01L29/7841 ,  H04N5/3355 ,  Y10S257/905 ,  Y10S257/907 ,  Y10S438/982

    摘要： A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between the gate and the drain and between the source and the drain.

    摘要翻译： 公开了一种半导体集成电路器件，例如存储器件或放射线检测器，其中数据存储单元形成在衬底上。 每个数据存储单元包括具有源极，漏极和栅极的场效应晶体管，以及布置在源极和漏极之间的用于存储在体内产生的电荷的主体。 体内净电荷的大小可以通过施加到晶体管的输入信号来调节，并且可以通过在栅极和漏极之间施加电压信号来至少部分地抵消由输入信号调节净电荷 在源和漏之间。

    Semiconductor device
    8.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20080073719A1

    公开(公告)日：2008-03-27

    申请号：US11977705

    申请日：2007-10-25

    申请人： Pierre Fazan ,  Serguei Okhonin

    发明人： Pierre Fazan ,  Serguei Okhonin

    IPC分类号： H01L27/108 ,  H01L27/12

    CPC分类号： H01L27/108 ,  G11C11/403 ,  G11C11/404 ,  G11C11/5621 ,  G11C2211/4016 ,  H01L21/84 ,  H01L27/10802 ,  H01L27/10844 ,  H01L27/1203 ,  H01L29/7841 ,  H04N5/3355 ,  Y10S257/905 ,  Y10S257/907 ,  Y10S438/982

    摘要： A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between the gate and the drain and between the source and the drain.

    摘要翻译： 公开了一种半导体集成电路器件，例如存储器件或放射线检测器，其中数据存储单元形成在衬底上。 每个数据存储单元包括具有源极，漏极和栅极的场效应晶体管，以及布置在源极和漏极之间的用于存储在体内产生的电荷的主体。 体内净电荷的大小可以通过施加到晶体管的输入信号来调节，并且可以通过在栅极和漏极之间施加电压信号来至少部分地抵消由输入信号调节净电荷 在源和漏之间。

    Semiconductor device
    9.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20080055974A1

    公开(公告)日：2008-03-06

    申请号：US11975862

    申请日：2007-10-22

    申请人： Pierre Fazan ,  Serguei Okhonin

    发明人： Pierre Fazan ,  Serguei Okhonin

    IPC分类号： G11C11/34

    CPC分类号： H01L27/108 ,  G11C11/403 ,  G11C11/404 ,  G11C11/5621 ,  G11C2211/4016 ,  H01L21/84 ,  H01L27/10802 ,  H01L27/10844 ,  H01L27/1203 ,  H01L29/7841 ,  H04N5/3355 ,  Y10S257/905 ,  Y10S257/907 ,  Y10S438/982

    摘要： A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for storing electrical charge generated in the body. The magnitude of the net electrical charge in the body can be adjusted by input signals applied to the transistor, and the adjustment of the net electrical charge by the input signals can be at least partially cancelled by applying electrical voltage signals between-the gate and the drain and between the source and the drain.

    摘要翻译： 公开了一种半导体集成电路器件，例如存储器件或放射线检测器，其中数据存储单元形成在衬底上。 每个数据存储单元包括具有源极，漏极和栅极的场效应晶体管，以及布置在源极和漏极之间的用于存储在体内产生的电荷的主体。 可以通过施加到晶体管的输入信号来调节身体中的净电荷的幅度，并且可以通过在栅极和栅极之间施加电压信号来至少部分地抵消通过输入信号调整净电荷 漏极和源极与漏极之间。