公开(公告)号：US20070259492A1

公开(公告)日：2007-11-08

申请号：US11618532

申请日：2006-12-29

申请人： Il Cheol Roh ,  Choon Hwan Kim

发明人： Il Cheol Roh ,  Choon Hwan Kim

IPC分类号： H01L21/8244 ,  H01L21/4763 ,  H01L21/8234

CPC分类号： H01L21/76802 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/31144 ,  H01L21/3145 ,  H01L21/31608 ,  H01L21/76829 ,  H01L27/10855

摘要： A method for forming storage node contacts in a semiconductor device includes forming an interlayer dielectric layer on a semiconductor substrate provided with transistors; forming a hydrogen diffusion preventing layer on the interlayer dielectric layer; forming a hard mask layer containing hydrogen atoms on the hydrogen diffusion preventing layer; forming storage node contact holes, which pass through the hydrogen diffusion preventing layer and the interlayer dielectric layer and expose impurity regions of the transistors, by etching the hydrogen diffusion preventing layer and the interlayer dielectric layer using the hard mask layer as an etching barrier layer; and forming the storage node contacts by filling the storage node contact holes with a conductive layer.

摘要翻译： 一种用于在半导体器件中形成存储节点触点的方法包括在设置有晶体管的半导体衬底上形成层间电介质层; 在所述层间电介质层上形成氢扩散防止层; 在氢扩散防止层上形成含有氢原子的硬掩模层; 通过使用硬掩模层作为蚀刻阻挡层蚀刻氢扩散防止层和层间电介质层，形成通过氢扩散防止层和层间电介质层并且暴露晶体管的杂质区域的存储节点接触孔; 以及通过用导电层填充存储节点接触孔来形成存储节点接触。

公开(公告)号：US07332391B2

公开(公告)日：2008-02-19

申请号：US11618532

申请日：2006-12-29

申请人： Il Cheol Roh ,  Choon Hwan Kim

发明人： Il Cheol Roh ,  Choon Hwan Kim

IPC分类号： H01L21/8234 ,  H01L21/8244 ,  H01L21/8242 ,  H01L21/20

CPC分类号： H01L21/76802 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/31144 ,  H01L21/3145 ,  H01L21/31608 ,  H01L21/76829 ,  H01L27/10855

摘要： A method for forming storage node contacts in a semiconductor device includes forming an interlayer dielectric layer on a semiconductor substrate provided with transistors; forming a hydrogen diffusion preventing layer on the interlayer dielectric layer; forming a hard mask layer containing hydrogen atoms on the hydrogen diffusion preventing layer; forming storage node contact holes, which pass through the hydrogen diffusion preventing layer and the interlayer dielectric layer and expose impurity regions of the transistors, by etching the hydrogen diffusion preventing layer and the interlayer dielectric layer using the hard mask layer as an etching barrier layer; and forming the storage node contacts by filling the storage node contact holes with a conductive layer.

摘要翻译： 一种用于在半导体器件中形成存储节点触点的方法包括在设置有晶体管的半导体衬底上形成层间电介质层; 在所述层间电介质层上形成氢扩散防止层; 在氢扩散防止层上形成含有氢原子的硬掩模层; 通过使用硬掩模层作为蚀刻阻挡层蚀刻氢扩散防止层和层间电介质层，形成通过氢扩散防止层和层间电介质层并且暴露晶体管的杂质区域的存储节点接触孔; 以及通过用导电层填充存储节点接触孔来形成存储节点接触。

公开(公告)号：US20090170311A1

公开(公告)日：2009-07-02

申请号：US12346669

申请日：2008-12-30

申请人： Choon Hwan Kim ,  Kyoung Bong Routh ,  II Cheol Rho

发明人： Choon Hwan Kim ,  Kyoung Bong Routh ,  II Cheol Rho

IPC分类号： H01L21/285 ,  H01L21/44 ,  H01L21/443

CPC分类号： H01L21/28518 ,  H01L21/28556

摘要： A method for fabricating a contact in a semiconductor device includes forming an insulating film having a contact hole over a bottom film, forming a thin metal film in the exposed portion of the bottom film by supplying a reaction gas containing a metal component to a surface of the bottom film exposed by the contact hole, forming a metal silicide film by performing an annealing process on the thin metal film, and forming a metal film over the metal silicide film to fill the contact hole.

摘要翻译： 一种用于在半导体器件中制造接触的方法包括：在底部膜上形成具有接触孔的绝缘膜，通过将含有金属成分的反应气体供给到底部膜的表面，在底部膜的暴露部分中形成薄金属膜 所述底部膜由所述接触孔暴露，通过对所述金属薄膜进行退火处理而形成金属硅化物膜，以及在所述金属硅化物膜上形成金属膜以填充所述接触孔。

公开(公告)号：US20100120240A1

公开(公告)日：2010-05-13

申请号：US12346492

申请日：2008-12-30

申请人： Kyoung Bong Rouh ,  Choon Hwan Kim ,  Il Cheol Rho

发明人： Kyoung Bong Rouh ,  Choon Hwan Kim ,  Il Cheol Rho

IPC分类号： H01L21/336

CPC分类号： H01L21/28035 ,  H01L21/223 ,  H01L21/823842 ,  H01L29/78

摘要： Provided are a method for fabricating a PMOS transistor and a method for forming a dual gate of a semiconductor device using the same. The method for fabricating a PMOS transistor includes forming a gate insulation layer over a semiconductor substrate; forming a polysilicon layer over the gate insulation layer; and doping the polysilicon layer using a boron (B) containing gas in one of an Atomic Layer Deposition (ALD) chamber and a Chemical Vapor Deposition (CVD) chamber.

摘要翻译： 提供一种用于制造PMOS晶体管的方法以及使用其形成半导体器件的双栅极的方法。 制造PMOS晶体管的方法包括在半导体衬底上形成栅极绝缘层; 在栅极绝缘层上形成多晶硅层; 并且使用在原子层沉积（ALD）室和化学气相沉积（CVD）室之一中的含有气体的硼（B）掺杂多晶硅层。

公开(公告)号：US07935591B2

公开(公告)日：2011-05-03

申请号：US12346492

申请日：2008-12-30

申请人： Kyoung Bong Rouh ,  Choon Hwan Kim ,  Il Cheol Rho

发明人： Kyoung Bong Rouh ,  Choon Hwan Kim ,  Il Cheol Rho

IPC分类号： H01L21/8238

CPC分类号： H01L21/28035 ,  H01L21/223 ,  H01L21/823842 ,  H01L29/78

摘要： Provided are a method for fabricating a PMOS transistor and a method for forming a dual gate of a semiconductor device using the same. The method for fabricating a PMOS transistor includes forming a gate insulation layer over a semiconductor substrate; forming a polysilicon layer over the gate insulation layer; and doping the polysilicon layer using a boron (B) containing gas in one of an Atomic Layer Deposition (ALD) chamber and a Chemical Vapor Deposition (CVD) chamber.

摘要翻译： 提供一种用于制造PMOS晶体管的方法以及使用其形成半导体器件的双栅极的方法。 制造PMOS晶体管的方法包括在半导体衬底上形成栅极绝缘层; 在栅极绝缘层上形成多晶硅层; 并且使用在原子层沉积（ALD）室和化学气相沉积（CVD）室之一中的含有气体的硼（B）掺杂多晶硅层。

公开(公告)号：US07563718B2

公开(公告)日：2009-07-21

申请号：US11618631

申请日：2006-12-29

申请人： Choon Hwan Kim

发明人： Choon Hwan Kim

IPC分类号： H01L21/4763

CPC分类号： H01L21/28556 ,  H01L21/28568

摘要： A semiconductor substrate is loaded into a reaction chamber to form a tungsten layer. A source gas including tungsten (W) is introduced into the reaction chamber to grow a crystal nucleus of the tungsten on the semiconductor substrate. A reduction gas containing boron (B) is introduced into the reaction chamber to form a tungsten layer on the semiconductor substrate by actions of the source gas and the reduction gas. A hydrogen (H2) gas is introduced into the reaction chamber to remove the boron (B) remaining in the tungsten layer.

摘要翻译： 将半导体衬底装载到反应室中以形成钨层。 将包含钨（W）的源气体引入反应室中以在半导体衬底上生长钨的晶核。 含有硼（B）的还原气体被引入到反应室中，通过源气体和还原气体的作用在半导体衬底上形成钨层。 将氢（H 2）气体引入到反应室中以去除残留在钨层中的硼（B）。

公开(公告)号：US20090004848A1

公开(公告)日：2009-01-01

申请号：US11951636

申请日：2007-12-06

申请人： Choon Hwan Kim ,  II Cheol Rho

发明人： Choon Hwan Kim ,  II Cheol Rho

IPC分类号： H01L21/4763

CPC分类号： H01L21/76876 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76877

摘要： A method for fabricating an interconnection in a semiconductor device includes forming a hydrogenated tungsten nucleation layer on a semiconductor substrate, and forming a bulk tungsten layer on the tungsten nucleation layer. Boron ions react with a hydrogen gas supplied together with a diborane gas to be restored to a diborane again, thereby preventing a boron layer from being formed on an interface of the tungsten nucleation layer.

摘要翻译： 在半导体器件中制造互连的方法包括在半导体衬底上形成氢化钨成核层，并在钨成核层上形成体钨层。 硼离子与与乙硼烷气体一起供给的氢气再次反应回到乙硼烷，从而防止在钨成核层的界面上形成硼层。

公开(公告)号：US20080003797A1

公开(公告)日：2008-01-03

申请号：US11618631

申请日：2006-12-29

申请人： Choon Hwan Kim

发明人： Choon Hwan Kim

IPC分类号： H01L21/44

CPC分类号： H01L21/28556 ,  H01L21/28568

摘要： A semiconductor substrate is loaded into a reaction chamber to form a tungsten layer. A source gas including tungsten (W) is introduced into the reaction chamber to grow a crystal nucleus of the tungsten on the semiconductor substrate. A reduction gas containing boron (B) is introduced into the reaction chamber to form a tungsten layer on the semiconductor substrate by actions of the source gas and the reduction gas. A hydrogen (H2) gas is introduced into the reaction chamber to remove the boron (B) remaining in the tungsten layer.

摘要翻译： 将半导体衬底装载到反应室中以形成钨层。 将包含钨（W）的源气体引入反应室中以在半导体衬底上生长钨的晶核。 含有硼（B）的还原气体被引入到反应室中，通过源气体和还原气体的作用在半导体衬底上形成钨层。 将氢（H 2 H 2）气体引入反应室中以去除残留在钨层中的硼（B）。

公开(公告)号：US5940730A

公开(公告)日：1999-08-17

申请号：US771579

申请日：1996-12-20

申请人： Noh Jung Kwak ,  Choon Hwan Kim

发明人： Noh Jung Kwak ,  Choon Hwan Kim

IPC分类号： H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/768 ,  H01L23/522 ,  H01L21/461

CPC分类号： H01L21/76804

摘要： The present invention relates to a method of forming a contact hole of a semiconductor device, and discloses a method of forming a contact hole of a semiconductor device which can remove an oxide film formed on the bottom of the contact hole, and make the edge portions of the entrance to the contact hole and reduce the topology of the contact hole by performing high frequency plasma etching processes in two stage in which the condition of pressure and electric power are different.

摘要翻译： 本发明涉及一种形成半导体器件的接触孔的方法，并且公开了一种形成半导体器件的接触孔的方法，该半导体器件可以去除形成在接触孔的底部上的氧化物膜，并使边缘部分 的接触孔的入口，并且通过在压力和电力的条件不同的两个阶段中进行高频等离子体蚀刻工艺来减小接触孔的拓扑。

公开(公告)号：US5702568A

公开(公告)日：1997-12-30

申请号：US668845

申请日：1996-06-24

申请人： Chan Soo Shin ,  Choon Hwan Kim

发明人： Chan Soo Shin ,  Choon Hwan Kim

IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L21/306

CPC分类号： H01L21/76801

摘要： The present invention discloses a method of forming a via hole of a semiconductor device, which includes the steps of: forming a plurality of first metal wires on a wafer; after coating a SOG film on the first oxide film, forming a groove in the SOG film using a mask in which a via hole contact is formed, the size of which is bigger than that of the real via hole to be formed in it; performing a process of filling up completely the groove portion (a two-step process for the first embodiment or a one-step process for the second embodiment); and forming a via hole using a contact mask the size of which is the same as that of the real via hole.

摘要翻译： 本发明公开了一种形成半导体器件的通孔的方法，包括以下步骤：在晶片上形成多个第一金属线; 在第一氧化膜上涂覆SOG膜之后，使用其中形成通孔接触的掩模在SOG膜中形成槽，其尺寸大于要在其中形成的真实通孔的尺寸; 执行完全填充凹槽部分的处理（第一实施例的两步工艺或第二实施例的一步工艺）; 以及使用与实际通孔的尺寸相同的接触掩模形成通孔。