公开(公告)号：US07355951B2

公开(公告)日：2008-04-08

申请号：US10252085

申请日：2002-09-23

申请人： In-kyeong Yoo ,  Won-bong Choi ,  Hyun-jung Shin

发明人： In-kyeong Yoo ,  Won-bong Choi ,  Hyun-jung Shin

IPC分类号： G11B9/00

CPC分类号： G11B9/10 ,  B82Y10/00 ,  G11B9/14 ,  G11B9/1409 ,  G11B9/1418 ,  G11B9/1463 ,  G11B11/115

摘要： A rapid data recording/reproducing method, a data recording system adopting the same, media for the system, and a tracking method, wherein the recording/reproducing method includes preparing media having a data recording layer in which a phase change is generated through electron absorption, generating electrons using an electron generating source at a position separated from the data recording layer by a predetermined interval, forming a magnetic field on the path of the electrons and cyclotron moving the electrons, recording data through local melting and cooling due to absorption of the electrons by the data recording layer. A micro-tip does not contact the data recording layer during electron collisions therewith, hence no damage is caused by or to the micro-tip. The present invention allows the region where the electron beam reaches the data recording layer to be minimized thereby maximizing the data recording density.

摘要翻译： 一种快速数据记录/再现方法，采用该记录系统的数据记录系统，用于该系统的介质和跟踪方法，其中记录/再现方法包括制备具有通过电子吸收产生相变的数据记录层的介质 在与数据记录层隔开预定间隔的位置处使用电子发生源产生电子，在电子和回旋加速器的移动电子的路径上形成磁场，通过局部熔化和冷却来记录数据 电子由数据记录层。 在与电子碰撞期间，微尖端不接触数据记录层，因此不会对微尖端造成损伤。 本发明允许电子束到达数据记录层的区域最小化，从而最大化数据记录密度。

公开(公告)号：US20060252276A1

公开(公告)日：2006-11-09

申请号：US11352310

申请日：2006-02-13

申请人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

发明人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

IPC分类号： H01L21/31

CPC分类号： B82Y10/00 ,  G11C13/025 ,  G11C2213/17 ,  Y10S977/943

摘要： A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.

摘要翻译： 一种由碳纳米管存储器件及其形成方法形成的快速，可靠，高度集成的存储器件，其中碳纳米管存储器件包括衬底，源电极，漏电极，具有高电的碳纳米管和 热导率，具有优异电荷存储能力的存储单元和栅电极。 源电极和漏电极在它们之间以预定间隔布置在衬底上并经受电压。 碳纳米管将源电极连接到漏电极并用作电荷运动的通道。 存储单元位于碳纳米管之上，并存储来自碳纳米管的电荷。 栅电极形成为与存储单元的上表面接触，并控制从碳纳米管流入存储单元的电荷量。

公开(公告)号：US06794666B2

公开(公告)日：2004-09-21

申请号：US10160102

申请日：2002-06-04

申请人： Won-bong Choi ,  In-kyeong Yoo

发明人： Won-bong Choi ,  In-kyeong Yoo

IPC分类号： G21G500

CPC分类号： B82Y30/00 ,  B82Y40/00 ,  C01B32/16 ,  H01J3/022 ,  H01J2237/06341 ,  H01J2237/3175 ,  Y10S977/901

摘要： An electron emission lithography apparatus and method using a selectively grown carbon nanotube as an electron emission source, wherein the electron emission lithography apparatus includes an electron emission source installed within a chamber and a stage, which is separated from the electron emission source by a predetermined distance and on which a sample is mounted, and wherein the electron emission source is a carbon nanotube having electron emission power. Since a carbon nanotube is used as an electron emission source, a lithography process can be performed with a precise critical dimension that prevents a deviation from occurring between the center of a substrate and the edge thereof and may realize a high throughput.

摘要翻译： 一种使用选择性生长的碳纳米管作为电子发射源的电子发射光刻设备和方法，其中电子发射光刻设备包括安装在室内的电子发射源和与电子发射源分离预定距离的电台 并且其上安装有样品，并且其中所述电子发射源是具有电子发射能力的碳纳米管。 由于使用碳纳米管作为电子发射源，可以以精确的临界尺寸进行光刻处理，从而防止在基板的中心与其边缘之间发生偏差，并且可以实现高生产率。

公开(公告)号：US07015500B2

公开(公告)日：2006-03-21

申请号：US10361024

申请日：2003-02-10

申请人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

发明人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

IPC分类号： H01B7/08 ,  H01L35/24

CPC分类号： B82Y10/00 ,  G11C13/025 ,  G11C2213/17 ,  Y10S977/943

摘要： A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.

摘要翻译： 一种由碳纳米管存储器件及其形成方法形成的快速，可靠，高度集成的存储器件，其中碳纳米管存储器件包括衬底，源电极，漏电极，具有高电的碳纳米管和 热导率，具有优异电荷存储能力的存储单元和栅电极。 源电极和漏电极在它们之间以预定间隔布置在衬底上并经受电压。 碳纳米管将源电极连接到漏电极并用作电荷运动的通道。 存储单元位于碳纳米管之上，并存储来自碳纳米管的电荷。 栅电极形成为与存储单元的上表面接触，并控制从碳纳米管流入存储单元的电荷量。

公开(公告)号：US07378328B2

公开(公告)日：2008-05-27

申请号：US11352310

申请日：2006-02-13

申请人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

发明人： Won-bong Choi ,  In-kyeong Yoo ,  Jae-uk Chu

IPC分类号： H01L21/20

CPC分类号： B82Y10/00 ,  G11C13/025 ,  G11C2213/17 ,  Y10S977/943

摘要： A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.

摘要翻译： 一种由碳纳米管存储器件及其形成方法形成的快速，可靠，高度集成的存储器件，其中碳纳米管存储器件包括衬底，源电极，漏电极，具有高电的碳纳米管和 热导率，具有优异电荷存储能力的存储单元和栅电极。 源电极和漏电极在它们之间以预定间隔布置在衬底上并经受电压。 碳纳米管将源电极连接到漏电极并用作电荷运动的通道。 存储单元位于碳纳米管之上，并存储来自碳纳米管的电荷。 栅电极形成为与存储单元的上表面接触，并控制从碳纳米管流入存储单元的电荷量。

公开(公告)号：US06687210B2

公开(公告)日：2004-02-03

申请号：US10090629

申请日：2002-03-06

申请人： In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

发明人： In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

IPC分类号： G11B700

CPC分类号： G11B11/08 ,  G11B9/08 ,  G11B13/00

摘要： A high-density information storage apparatus using electron emission and methods of writing, reading and erasing information using the same are provided. The high-density information storage apparatus includes a lower electrode, a photoconductive layer and a recording medium sequentially provided on the lower electrode, a conductive layer converting unit for making the photoconductive layer conductive, a data write and read unit for writing data to the recording medium or reading data from the recording medium, a data loss preventing unit for preventing loss of data during data write and read operations, and a power supply connected to the lower electrode and the data write and read unit, for supplying voltage necessary for reading and writing data.

摘要翻译： 提供了使用电子发射的高密度信息存储装置和使用其的写入，读取和擦除信息的方法。 高密度信息存储装置包括下电极，光电导层和顺序地设置在下电极上的记录介质，用于使光电导层导通的导电层转换单元，用于将数据写入记录的数据写入和读取单元 介质或从记录介质读取数据，数据丢失防止单元，用于防止数据写入和读取操作期间的数据丢失，以及连接到下部电极和数据写入和读取单元的电源，用于提供读取所需的电压 写数据

公开(公告)号：US08164130B2

公开(公告)日：2012-04-24

申请号：US10852287

申请日：2004-05-25

申请人： Sun-ae Seo ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Wan-jun Park

发明人： Sun-ae Seo ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Wan-jun Park

IPC分类号： G11C11/34

CPC分类号： G11C13/0007 ,  G11C2213/32 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

摘要： A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.

公开(公告)号：US08043926B2

公开(公告)日：2011-10-25

申请号：US12926042

申请日：2010-10-22

申请人： Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

发明人： Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

IPC分类号： H01L21/02

CPC分类号： H01L27/115 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/51 ,  H01L27/112 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

摘要： A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

公开(公告)号：US07901586B2

公开(公告)日：2011-03-08

申请号：US11882112

申请日：2007-07-30

申请人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

发明人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

IPC分类号： B44C1/22 ,  H01L21/302

CPC分类号： B82B3/00 ,  B29C59/022 ,  B29C59/026 ,  B29C2059/023 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/32139

摘要： A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

摘要翻译： 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。

公开(公告)号：US20090045450A1

公开(公告)日：2009-02-19

申请号：US11976250

申请日：2007-10-23

申请人： June-mo Koo ,  Suk-pil Kim ,  Young-gu Jin ,  Won-joo Kim ,  In-kyeong Yoo ,  Yoon-dong Park

发明人： June-mo Koo ,  Suk-pil Kim ,  Young-gu Jin ,  Won-joo Kim ,  In-kyeong Yoo ,  Yoon-dong Park

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/66825 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7881

摘要： Provided are a non-volatile memory device, which may have higher integration density, improved or optimal structure, and/or reduce or minimize interference between adjacent cells without using an SOI substrate, and a method of fabricating the non-volatile memory device. The non-volatile memory device may include: a semiconductor substrate comprising a body, and a pair of fins protruding from the body; a buried insulating layer filling between the pair of fins; a pair of floating gate electrodes on outer surfaces of the pair of fins to a height greater than that of the pair of fins; and a control gate electrode on the pair of floating gate electrodes.

摘要翻译： 提供了一种非易失性存储器件，其可以具有更高的集成密度，改进的或最优的结构，和/或减少或最小化相邻单元之间的干扰而不使用SOI衬底，以及制造非易失性存储器件的方法。 非易失性存储器件可以包括：半导体衬底，其包括主体和从主体突出的一对鳍; 埋在绝缘层之间的一对散热片; 一对浮栅电极，其在所述一对翅片的外表面上的高度大于所述一对鳍片的高度; 以及一对浮栅上的控制栅电极。