公开(公告)号：US06728820B1

公开(公告)日：2004-04-27

申请号：US09579006

申请日：2000-05-26

申请人： Lee Brian ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

发明人： Lee Brian ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

IPC分类号： G06F1336

CPC分类号： G06F3/14

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06789154B1

公开(公告)日：2004-09-07

申请号：US09579203

申请日：2000-05-26

申请人： Brian Lee ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

发明人： Brian Lee ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Milivoje Aleksic

IPC分类号： G06F1314

CPC分类号： G06F13/404

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06670958B1

公开(公告)日：2003-12-30

申请号：US09579224

申请日：2000-05-26

申请人： Milivoje Aleksic ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

发明人： Milivoje Aleksic ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

IPC分类号： G06F1516

CPC分类号： G06F3/14 ,  G09G5/363 ,  G09G2352/00

摘要： In a specific embodiment, a system for providing video includes a system bus, which in one embodiment is an Advanced Graphics Port (AGP) busy. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，用于提供视频的系统包括系统总线，其在一个实施例中是高级图形端口（AGP）忙。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06662257B1

公开(公告)日：2003-12-09

申请号：US09579202

申请日：2000-05-26

申请人： Gordon Caruk ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Milivoje Aleksic ,  Brian Lee

发明人： Gordon Caruk ,  Indra Laksono ,  Antonio Asaro ,  Andrew E. Gruber ,  Milivoje Aleksic ,  Brian Lee

IPC分类号： G06F1314

CPC分类号： G06F13/404 ,  G06F3/14

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换。

公开(公告)号：US06184908B2

公开(公告)日：2001-02-06

申请号：US09067512

申请日：1998-04-27

申请人： Jason CK Chan ,  Milivoje Aleksic ,  Antonio Asaro ,  James Doyle ,  Indra Laksono

发明人： Jason CK Chan ,  Milivoje Aleksic ,  Antonio Asaro ,  James Doyle ,  Indra Laksono

IPC分类号： G06F1500

CPC分类号： G06T15/005

摘要： To minimize CPU processing requirements for preparing and transferring data to a graphics processor, a graphics command processor is provided that supports application-level commands and references to the data associated with these commands. The graphics command processor parses the application command and data reference parameters, and subsequently fetches the appropriate graphics data from memory directly, without requiring additional CPU resources. To optimize performance, the graphics command processor fetches the data in parallel with the parsing and processing of the application commands from the CPU. The graphics command processor also includes a processing unit that converts the data from the format used by the application program to the format used for rendering. The graphics command processor creates the commands and data sequences used by a graphics engine to render each object of the image. Because the graphics command processor is closely coupled with the graphics engine, a number of efficiency can be gained, particularly with regard to the transfer of related data items. The processing of the primitive graphic command and data sequences by the graphics engine is asynchronous with the receipt of subsequent commands from the CPU and the fetching of subsequent data associated with the commands from the memory. In this manner, the latency associated with the conventional sequential processing of graphics data is minimized.

摘要翻译： 为了最大限度地减少CPU处理对图形处理器的准备和传输数据的需求，提供了一个图形命令处理器，支持应用级命令和对与这些命令相关联的数据的引用。 图形命令处理器解析应用程序命令和数据参考参数，然后直接从存储器中获取适当的图形数据，而不需要额外的CPU资源。 为了优化性能，图形命令处理器从CPU解析和处理应用程序命令并行获取数据。 图形命令处理器还包括处理单元，其将来自应用程序使用的格式的数据转换为用于呈现的格式。 图形命令处理器创建由图形引擎使用以渲染图像的每个对象的命令和数据序列。 因为图形命令处理器与图形引擎紧密耦合，所以可以获得许多效率，特别是关于相关数据项的传送。 图形引擎对原始图形命令和数据序列的处理与从CPU接收后续命令以及从与存储器的命令相关联的后续数据的获取是异步的。 以这种方式，与图形数据的常规顺序处理相关联的延迟最小化。

公开(公告)号：US06747654B1

公开(公告)日：2004-06-08

申请号：US09553977

申请日：2000-04-20

申请人： Indra Laksono ,  Milivoje Aleksic

发明人： Indra Laksono ,  Milivoje Aleksic

IPC分类号： G06F1516

CPC分类号： G06T15/005 ,  G06T1/20 ,  G06T2210/52

摘要： A multiple device frame synchronization method and apparatus utilizes events completion signaling between multiple devices, such as multiple graphics processors. The signaling serves as a stall command for stalling graphics data rendering commands in a command FIFO of the rendering engine of a graphics processor in response to a rendering complete signal, or other event signal generated by the other graphics processor. Accordingly, the processor that, for example, completes a current frame relay is stalled until the other processor has completed its rendering function for a particular odd line, even line, entire frame or partial frame as desired.

摘要翻译： 多设备帧同步方法和装置利用诸如多个图形处理器的多个设备之间的事件完成信令。 信令用作响应于再现完成信号或由另一图形处理器生成的其他事件信号而停止图形处理器的渲染引擎的命令FIFO中的图形数据呈现命令的停止命令。 因此，例如完成当前帧中继的处理器停止，直到另一个处理器根据需要完成其特定奇数行，偶数行，整个帧或部分帧的渲染功能。

公开(公告)号：US06633296B1

公开(公告)日：2003-10-14

申请号：US09579432

申请日：2000-05-26

申请人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

发明人： Indra Laksono ,  Milivoje Aleksic ,  Antonio Asaro ,  Andrew E. Gruber ,  Gordon Caruk ,  Brian Lee

IPC分类号： G06F1516

CPC分类号： G06F3/14 ,  G09G5/363 ,  G09G2352/00 ,  G09G2360/06

摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换

公开(公告)号：US09088793B2

公开(公告)日：2015-07-21

申请号：US13076568

申请日：2011-03-31

申请人： Edward Hong ,  Dong Liu ,  Hongri Wang ,  Kai Yang ,  Indra Laksono ,  Eric Young ,  Xu Gang Zhao

发明人： Edward Hong ,  Dong Liu ,  Hongri Wang ,  Kai Yang ,  Indra Laksono ,  Eric Young ,  Xu Gang Zhao

IPC分类号： H04N7/12 ,  H04N19/103 ,  H04N19/61 ,  H04N19/44 ,  H04N19/436 ,  H04N19/91 ,  H04N19/136

CPC分类号： H04N19/103 ,  H04N19/136 ,  H04N19/436 ,  H04N19/44 ,  H04N19/61 ,  H04N19/91

摘要： A video decoder includes an entropy decoding device that generates entropy decoded (EDC) data from an encoded video signal. A multi-format video decoding device includes a plurality of vector processor units that generate a decoded video signal from the EDC data. The plurality of vector processing units includes at least one filter vector processor that operates in conjunction with a plurality of programmable filter parameters.

摘要翻译： 视频解码器包括从编码视频信号产生熵解码（EDC）数据的熵解码装置。 多格式视频解码装置包括从EDC数据生成解码视频信号的多个矢量处理器单元。 多个矢量处理单元包括至少一个与多个可编程滤波器参数相结合的滤波器矢量处理器。

公开(公告)号：US08854382B2

公开(公告)日：2014-10-07

申请号：US12965109

申请日：2010-12-10

申请人： Edward Hong ,  Hongri Wang ,  Dong Liu ,  Kai Yang ,  Indra Laksono ,  Eric Young ,  Xu Gang Zhao

发明人： Edward Hong ,  Hongri Wang ,  Dong Liu ,  Kai Yang ,  Indra Laksono ,  Eric Young ,  Xu Gang Zhao

IPC分类号： G06T1/20 ,  H04N19/423 ,  H04N19/42

CPC分类号： H04N19/00527 ,  H04N19/423 ,  H04N19/439

摘要： A technique for encoding and decoding video information uses a plurality of video processing modules (VPMs), whereby each video processing module is dedicated to a particular video processing function, such as filtering, matrix arithmetic operations, and the like. Information is transferred between the video processing modules using a set of first-in first-out (FIFO) buffers. For example, to transfer pixel information from a first VPM to a second VPM, the first VPM stores the pixel information at the head of a FIFO buffer, while the second VPM retrieves information from the tail of the FIFO buffer. The FIFO buffer thus permits transfer of information between the VPMs without storage of the information to a cache or other techniques that can reduce video processing speed.

摘要翻译： 用于对视频信息进行编码和解码的技术使用多个视频处理模块（VPM），由此每个视频处理模块专用于特定的视频处理功能，例如滤波，矩阵算术运算等。 使用一组先进先出（FIFO）缓冲器在视频处理模块之间传送信息。 例如，为了将像素信息从第一VPM传送到第二VPM，第一VPM将像素信息存储在FIFO缓冲器的头部，而第二VPM从FIFO缓冲器的尾部检索信息。 因此，FIFO缓冲器允许在VPM之间传送信息，而不将信息存储到高速缓存或可以降低视频处理速度的其他技术。

公开(公告)号：US20090031419A1

公开(公告)日：2009-01-29

申请号：US12246375

申请日：2008-10-06

申请人： Indra Laksono

发明人： Indra Laksono

IPC分类号： G06F15/16 ,  G06F12/14

CPC分类号： H04N21/6587 ,  H04N7/163 ,  H04N21/21 ,  H04N21/2143 ,  H04N21/23 ,  H04N21/234 ,  H04N21/234309 ,  H04N21/234363 ,  H04N21/2393 ,  H04N21/25816 ,  H04N21/25875 ,  H04N21/4126 ,  H04N21/41407 ,  H04N21/43615 ,  H04N21/4363 ,  H04N21/43637 ,  H04N21/4383 ,  H04N21/44 ,  H04N21/440263 ,  H04N21/4532 ,  H04N21/4542 ,  H04N21/472 ,  H04N21/47202 ,  H04N21/4826 ,  H04N21/6168 ,  H04N21/6175 ,  H04N21/6181 ,  H04N21/64322

摘要： A multimedia server receives a plurality of programs of a multimedia source. The multimedia server includes a tuning module to receive the plurality of programs and to select a set of programs from the plurality of programs based on a set of program select commands that is derived from select requests. A program mixer mixes the set of programs into a stream of program data. One or more transceiving modules transmit the stream of program data on to corresponding communication paths and receive the select requests. A client module produces the select requests for one or more clients. The client module includes a selection module to produce at least one of the select requests. A network interface controller transmits at least one of select requests to the multimedia server and receives the stream of program data via the communication path or paths in response.

摘要翻译： 多媒体服务器接收多媒体源的多个节目。 多媒体服务器包括一个调谐模块，用于接收多个程序，并根据从选择请求导出的一组程序选择命令，从多个程序中选择一组程序。 程序混合器将该组程序混合到程序数据流中。 一个或多个收发模块将节目数据流发送到对应的通信路径并接收选择请求。 客户端模块为一个或多个客户端生成选择请求。 客户端模块包括选择模块以产生至少一个选择请求。 网络接口控制器将选择请求中的至少一个发送到多媒体服务器，并经由通信路径或响应路径接收节目数据流。