公开(公告)号：US20240162129A1

公开(公告)日：2024-05-16

申请号：US18504309

申请日：2023-11-08

Applicant: Infineon Technologies AG

Inventor： Christoph Bayer ,  Michael Fügl ,  Frank Singer ,  Thorsten Meyer ,  Fabian Craes ,  Andreas Grassmann ,  Frederik Otto

IPC: H01L23/498 ,  B82Y10/00 ,  H01L23/00 ,  H01L23/31 ,  H01L25/07

CPC classification number: H01L23/49811 ,  B82Y10/00 ,  H01L23/3135 ,  H01L23/49822 ,  H01L23/49844 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/32245 ,  H01L2224/48245 ,  H01L2224/73265 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181

Abstract: A substrate arrangement includes: a first metallization layer, nanowires arranged on a surface of the first metallization layer; and a component arranged on the first metallization layer such that a first subset of the nanowires is arranged between the first metallization layer and the component. The nanowires are evenly distributed over a section of the surface area or over the entire surface area of the first metallization layer. Each nanowire includes first and second ends. The first end of each nanowire is inseparably connected to the surface of the first metallization layer. The second end of each nanowire of the first subset is inseparably connected to a surface of one of the component such that the first subset of nanowires forms a permanent connection between the first metallization layer and the component. There are fewer nanowires in the first subset of nanowires than there are total nanowires.

公开(公告)号：US11329021B2

公开(公告)日：2022-05-10

申请号：US16685318

申请日：2019-11-15

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Fabian Craes ,  Barbara Eichinger ,  Martin Mischitz ,  Frederik Otto ,  Fabien Thion

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/428 ,  H01L21/782

Abstract: A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.

公开(公告)号：US20210398821A1

公开(公告)日：2021-12-23

申请号：US17342975

申请日：2021-06-09

Applicant: Infineon Technologies AG

Inventor： Fabian Craes ,  Carsten Ehlers ,  Olaf Hohlfeld ,  Ulrich Wilke

IPC: H01L21/54 ,  H01L21/48 ,  H01L21/56 ,  H01L21/308 ,  H01L21/67 ,  H01L23/00

Abstract: A method includes forming a first electrically conductive layer on a first side of a dielectric insulation layer, forming a structured mask layer on a side of the first electrically conductive layer that faces away from the dielectric insulation layer, forming at least one trench in the first electrically conductive layer, said at least one trench extending through the entire first electrically conductive layer to the dielectric insulation layer, forming a coating which covers at least the bottom and the side walls of the at least one trench, and removing the mask layer after the coating has been formed.

公开(公告)号：US11715647B2

公开(公告)日：2023-08-01

申请号：US17342975

申请日：2021-06-09

Applicant: Infineon Technologies AG

Inventor： Fabian Craes ,  Carsten Ehlers ,  Olaf Hohlfeld ,  Ulrich Wilke

IPC: H01L21/54 ,  H01L21/48 ,  H01L21/308 ,  H01L21/56 ,  H01L21/67 ,  H01L23/00

CPC classification number: H01L21/54 ,  H01L21/308 ,  H01L21/4857 ,  H01L21/56 ,  H01L21/67069 ,  H01L24/27

Abstract: A method includes forming a first electrically conductive layer on a first side of a dielectric insulation layer, forming a structured mask layer on a side of the first electrically conductive layer that faces away from the dielectric insulation layer, forming at least one trench in the first electrically conductive layer, said at least one trench extending through the entire first electrically conductive layer to the dielectric insulation layer, forming a coating which covers at least the bottom and the side walls of the at least one trench, and removing the mask layer after the coating has been formed.

公开(公告)号：US20200161269A1

公开(公告)日：2020-05-21

申请号：US16685318

申请日：2019-11-15

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Fabian Craes ,  Barbara Eichinger ,  Martin Mischitz ,  Frederik Otto ,  Fabien Thion

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/428

Abstract: A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.