公开(公告)号：US20210159172A1

公开(公告)日：2021-05-27

申请号：US16697580

申请日：2019-11-27

Applicant: Infineon Technologies AG

Inventor： Thomas BASLER ,  Andreas HUERNER ,  Caspar LEENDERTZ ,  Dethard PETERS

IPC: H01L23/525 ,  H01L23/62 ,  H01L29/16

Abstract: A semiconductor device is provided. In an embodiment, the semiconductor device comprises a control region, a first power region, a second power region, an isolation region and/or a short circuit structure. The control region comprises a control terminal. The first power region comprises a first power terminal. The second power region comprises a second power terminal. The isolation region is between the control region and the first power region. The short circuit structure extends from the first power region, through the isolation region, to the control region. The short circuit structure is configured to form a low-resistive connection between the control region and the first power region during a failure state of the semiconductor device.

公开(公告)号：US20200098869A1

公开(公告)日：2020-03-26

申请号：US16576042

申请日：2019-09-19

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim SCHULZE ,  Thomas BASLER ,  Andre Rainer STEGNER

IPC: H01L29/167 ,  H01L29/16

Abstract: A silicon carbide device includes a transistor cell with a front side doping region, a body region, and a drift region. The body region includes a first portion having a first average net doping concentration and a second portion having a second average net doping concentration. The first portion and the second portion have an extension of at least 50 nm in a vertical direction. The first average net doping concentration is at least two times the second average net doping concentration, and the first average net doping concentration is at least 1·1017 cm−3.

公开(公告)号：US20180269872A1

公开(公告)日：2018-09-20

申请号：US15921893

申请日：2018-03-15

Applicant: Infineon Technologies AG

Inventor： Thomas BASLER ,  Roman BABURSKE ,  Johannes Georg LAVEN ,  Franz-Josef NIEDERNOSTHEIDE ,  Hans-Joachim SCHULZE

IPC: H03K17/567 ,  H03K17/687 ,  H01L27/06 ,  H01L27/088 ,  H01L29/78 ,  H01L29/739 ,  H01L29/778 ,  H01L29/165 ,  H01L29/16 ,  H01L29/808

CPC classification number: H03K17/567 ,  H01L27/0635 ,  H01L27/088 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/7393 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/808 ,  H01L2924/10272 ,  H01L2924/13055 ,  H01L2924/13091 ,  H03K17/12 ,  H03K17/687 ,  H03K2217/0036

Abstract: Transistor devices are described that include a first transistor and a second transistor coupled in parallel between a first terminal and a second terminal. The second transistor is based on a wide bandgap semiconductor material. The second transistor has a breakthrough voltage lower than a breakthrough voltage of the first transistor over a predetermined operating range. The predetermined operating range comprises at least an operating range for which the transistor device is specified.

公开(公告)号：US20220085601A1

公开(公告)日：2022-03-17

申请号：US17019746

申请日：2020-09-14

Applicant: Infineon Technologies AG

Inventor： Dethard PETERS ,  Thomas BASLER ,  Paul SOCHOR

IPC: H02H9/04 ,  H01L27/06 ,  H01L49/02 ,  H01L29/92 ,  H01L29/16 ,  H01L29/20 ,  H01L29/808 ,  H01L29/78

Abstract: An apparatus includes a unipolar power transistor and an RC snubber. The RC snubber has a capacitor between a poly silicon structure and a semiconductor substrate. The capacitor has a p-n junction. The RC snubber has a resistor between a source of the unipolar power transistor and a first layer forming the capacitor. The unipolar transistor and the RC snubber are coupled in parallel. The RC snubber and the unipolar power transistor are formed monolithically on the semiconductor substrate.

公开(公告)号：US20210273088A1

公开(公告)日：2021-09-02

申请号：US17186281

申请日：2021-02-26

Applicant: Infineon Technologies AG

Inventor： Thomas BASLER ,  Hans-Guenter ECKEL ,  Jan FUHRMANN ,  Dethard PETERS ,  Florian STOERMER

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/40 ,  H01L29/47

Abstract: In an example, a semiconductor device includes an insulated gate transistor cell, a first region (e.g., a drain region and/or a drift region), a cathode region, a second region (e.g., an anode region and/or a separation region), and a source electrode. The insulated gate transistor cell includes a source region and a gate electrode. The source region and the cathode region are in a silicon carbide body. The gate electrode and the cathode region are electrically connected. The cathode region, the source region, and the first region have a first conductivity type. The second region has a second conductivity type and is between the cathode region and the first region. The source electrode and the source region are electrically connected. The source electrode and the second region are in contact with each other. A rectifying junction is electrically coupled between the source electrode and the cathode region.