Secure computing device
    1.
    发明授权

    公开(公告)号:US11768970B2

    公开(公告)日:2023-09-26

    申请号:US16694361

    申请日:2019-11-25

    IPC分类号: G06F21/84 G06F21/74

    摘要: A secure computing device having a storage arrangement configured to store a secret. The secure computing device includes a first interface configured to control a display, and a second interface configured to receive an input signal having information which reproduces a prompt to display the secret. The secure computing device is designed to read the secret from the storage arrangement on the basis of the input signal, and to control the display via the first interface in such a way that a display of the secret is effected.

    WALLET, DATABASE SYSTEM AND METHOD FOR PRODUCING A WALLET

    公开(公告)号:US20230100641A1

    公开(公告)日:2023-03-30

    申请号:US17935668

    申请日:2022-09-27

    发明人: Walther Pachler

    IPC分类号: H04L9/32 G06Q20/36 H04L9/08

    摘要: A wallet including an electronic data storage unit for storing wallet information, and a data interface configured to provide a read access to the electronic data storage unit. A controller of the wallet is configured to control the wallet at a first point in time in a first operating mode, in which there is a restriction for the read access to the wallet information, and to control the wallet at a later second point in time in a second operating mode, in which the restriction to the read access is cancelled. The transition from the first operating mode to the second operating mode is irreversible.

    BOOSTED NEAR FIELD COMMUNICATION DEVICE
    4.
    发明申请

    公开(公告)号:US20170346533A1

    公开(公告)日:2017-11-30

    申请号:US15605998

    申请日:2017-05-26

    IPC分类号: H04B5/02 H04B5/00

    摘要: A boosted near field communication device includes an electronic circuit, a transceiver circuit, an interface coupling the electronic circuit with a host controller, and a memory containing a first information about an activation characteristic of the electronic circuit. The transceiver circuit is configured to determine a timing requirement of a reading device based on one or more request signals, activate the electronic circuit with energy obtained at least one of from an electromagnetic field generated by the reading device or from a battery on receiving a request signal from the reading device, and ensure that after activating the electronic circuit, the electronic circuit can receive and process a request signal from the reading device corresponding to the determined timing requirement by using the determined timing requirement and the first information about an activation characteristic.

    Circuit, method and apparatus for performing near-field communication

    公开(公告)号:US11031973B2

    公开(公告)日:2021-06-08

    申请号:US16594656

    申请日:2019-10-07

    摘要: A circuit for performing a near-field communication having a contactless circuit which is configured for the contactless exchange of data signals with an external contactless reading device, a security circuit which has a memory in which application identifiers are stored and which is configured to execute security-related applications, and a control circuit which is configured to execute non-security-related applications, wherein the contactless circuit, the security circuit and the control circuit are coupled with one another in such a way and, using at least one of the application identifiers, are configured in such a way that the data signals are supplied from the contactless circuit to the control circuit and vice versa exclusively by means of the security circuit. The security circuit can furthermore store bonding and authentication keys for applications in the control circuit in order to set up a secure data exchange channel for these applications.

    Boosted near field communication device

    公开(公告)号:US10735053B2

    公开(公告)日:2020-08-04

    申请号:US15605998

    申请日:2017-05-26

    IPC分类号: H04B5/02 H04B5/00

    摘要: A boosted near field communication device includes an electronic circuit, a transceiver circuit, an interface coupling the electronic circuit with a host controller, and a memory containing a first information about an activation characteristic of the electronic circuit. The transceiver circuit is configured to determine a timing requirement of a reading device based on one or more request signals, activate the electronic circuit with energy obtained at least one of from an electromagnetic field generated by the reading device or from a battery on receiving a request signal from the reading device, and ensure that after activating the electronic circuit, the electronic circuit can receive and process a request signal from the reading device corresponding to the determined timing requirement by using the determined timing requirement and the first information about an activation characteristic.

    SECURE COMPUTING DEVICE
    8.
    发明申请

    公开(公告)号:US20200167507A1

    公开(公告)日:2020-05-28

    申请号:US16694361

    申请日:2019-11-25

    IPC分类号: G06F21/84 G06F21/74

    摘要: A secure computing device having a storage arrangement configured to store a secret. The secure computing device includes a first interface configured to control a display, and a second interface configured to receive an input signal having information which reproduces a prompt to display the secret. The secure computing device is designed to read the secret from the storage arrangement on the basis of the input signal, and to control the display via the first interface in such a way that a display of the secret is effected.

    Chip card module, chip card and method of forming a chip card module

    公开(公告)号:US10043126B2

    公开(公告)日:2018-08-07

    申请号:US15477128

    申请日:2017-04-03

    摘要: In various embodiments, a chip card module for a chip card is provided. The chip card module may include a carrier with a first side and an opposite second side, a chip arranged over the first side of the carrier, an antenna arranged over the carrier. The antenna may be electrically conductively coupled to the chip and configured to inductively couple to a second antenna formed on a chip card body of the chip card. The chip card module may further include a capacitor electrically conductively coupled to the chip, the capacitor including a first electrode arranged over the first side of the carrier, and a second electrode arranged over the second side of the carrier.