公开(公告)号：US10324867B2

公开(公告)日：2019-06-18

申请号：US15482646

申请日：2017-04-07

申请人： Intel Corporation

发明人： Sivakumar Radhakrishnan ,  Mahesh S. Natu ,  Zhenyu Zhu ,  Malay Trivedi ,  Randall L. Albion ,  Chris Ruffin

IPC分类号： G06F13/16 ,  G06F13/40 ,  G06F13/24 ,  G06F3/06

摘要： Devices, systems, and methods for implementing a scalable extended basic input/output system (BIOS) region that increases the BIOS footprint of a system, are provided and described. In addition to a traditional BIOS region located in the memory mapped input/output (MMIO) low region, an extended BIOS region is initialized in a MMIO area of the system address map, where both regions are accessed by MMIO access requests.

公开(公告)号：US20180293187A1

公开(公告)日：2018-10-11

申请号：US15482646

申请日：2017-04-07

申请人： Intel Corporation

发明人： Sivakumar Radhakrishnan ,  Mahesh S. Natu ,  Zhenyu Zhu ,  Malay Trivedi ,  Randall L. Albion ,  Chris Ruffin

IPC分类号： G06F13/16 ,  G06F13/24 ,  G06F13/40 ,  G06F3/06 ,  G06F9/44

CPC分类号： G06F13/1668 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/0679 ,  G06F13/24 ,  G06F13/4068

摘要： Devices, systems, and methods for implementing a scalable extended basic input/output system (BIOS) region that increases the BIOS footprint of a system, are provided and described. In addition to a traditional BIOS region located in the memory mapped input/output (MMIO) low region, an extended BIOS region is initialized in a MMIO area of the system address map, where both regions are accessed by MMIO access requests.

公开(公告)号：US10222823B2

公开(公告)日：2019-03-05

申请号：US14750159

申请日：2015-06-25

申请人： Intel Corporation

发明人： Thane M. Larson ,  Ramamurthy Krithivas ,  Chris Ruffin

IPC分类号： G06F1/14 ,  G06F9/4401 ,  G06F1/3203

摘要： The present disclosure describes embodiments of apparatuses and methods related to a computing apparatus with a real time clock (RTC) coupled to a bus, where the RTC does not have a backup power source to maintain time and date of the RTC. The computing apparatus may have firmware coupled to the bus, and the firmware may contain boot logic with network time protocol (NTP) logic. The computing apparatus may have persistent memory coupled to the bus with configuration parameters. The computing apparatus may have a controller coupled to the bus, where the controller is to retrieve the configuration parameters from the persistent memory and processes the boot logic with the NTP logic using the configuration parameters to transmit an NTP request over the bus and receives a coordinated universal time (UTC) over the bus and stores the UTC in the RTC.

公开(公告)号：US20160378135A1

公开(公告)日：2016-12-29

申请号：US14750159

申请日：2015-06-25

申请人： Intel Corporation

发明人： Thane M. Larson ,  Ramamurthy Krithivas ,  Chris Ruffin

IPC分类号： G06F1/14 ,  G06F9/44

CPC分类号： G06F1/14 ,  G06F1/3203 ,  G06F9/4401

摘要： The present disclosure describes embodiments of apparatuses and methods related to a computing apparatus with a real time clock (RTC) coupled to a bus, where the RTC does not have a backup power source to maintain time and date of the RTC. The computing apparatus may have firmware coupled to the bus, and the firmware may contain boot logic with network time protocol (NTP) logic. The computing apparatus may have persistent memory coupled to the bus with configuration parameters. The computing apparatus may have a controller coupled to the bus, where the controller is to retrieve the configuration parameters from the persistent memory and processes the boot logic with the NTP logic using the configuration parameters to transmit an NTP request over the bus and receives a coordinated universal time (UTC) over the bus and stores the UTC in the RTC.

摘要翻译： 本公开描述了与具有耦合到总线的实时时钟（RTC）的计算装置相关的装置和方法的实施例，其中RTC没有备用电源来维持RTC的时间和日期。 计算设备可以具有耦合到总线的固件，并且固件可以包含具有网络时间协议（NTP）逻辑的引导逻辑。 计算设备可以具有通过配置参数耦合到总线的持久存储器。 计算设备可以具有耦合到总线的控制器，其中控制器将从持久存储器检索配置参数，并使用配置参数使用NTP逻辑处理引导逻辑，以通过总线发送NTP请求，并且接收协调 通用时间（UTC），并将UTC存储在RTC中。