公开(公告)号：US20230063955A1

公开(公告)日：2023-03-02

申请号：US18048593

申请日：2022-10-21

Applicant: Intel Corporation

Inventor： DORON RAJWAN ,  EFRAIM ROTEM ,  ELIEZER WEISSMANN ,  AVINASH N. ANANTHAKRISHNAN ,  DORIT SHAPIRA

IPC: G06F1/3228 ,  G06F1/324 ,  G06F1/3237 ,  G06F1/3203

Abstract: In an embodiment, a processor includes processing cores, and a central control unit to: concurrently execute an outer control loop and an inner control loop, wherein the outer control loop is to monitor the processor as a whole, and wherein the inner control loop is to monitor a first processing core included in the processor; determine, based on the outer control loop, a first control action for the first processing core included in the processor; determine, based on the inner control loop, a second control action for the first processing core included in the processor; based on a comparison of the first control action and the second control action, select one of the first control action and the second control action as a selected control action; and apply the selected control action to the first processing core. Other embodiments are described and claimed.

公开(公告)号：US20180095913A1

公开(公告)日：2018-04-05

申请号：US15281472

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： XIUTING C. MAN ,  JEREMY J. SHRALL ,  DEEPAK GANAPATHY ,  DORIT SHAPIRA

IPC: G06F13/24 ,  G06F1/32 ,  G06F1/20

CPC classification number: G06F13/24 ,  G06F1/206 ,  G06F1/3296 ,  Y02D10/14

Abstract: In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may be to: receive a plurality of values indicating thermal status values for a memory unit at multiple points in time across a first time window; determine a running average value based on the plurality of values indicating thermal status values in the memory unit; and in response to a determination that the running average value has exceeded a high thermal status threshold value, generate a thermal interrupt indicating a high thermal status event in the processor. Other embodiments are described and claimed.

公开(公告)号：US20200285294A1

公开(公告)日：2020-09-10

申请号：US16880167

申请日：2020-05-21

Applicant: Intel Corporation

Inventor： DORON RAJWAN ,  EFRAIM ROTEM ,  ELIEZER WEISSMANN ,  AVINASH N. ANANTHAKRISHNAN ,  DORIT SHAPIRA

IPC: G06F1/3228 ,  G06F1/324 ,  G06F1/3237 ,  G06F1/3203

Abstract: In an embodiment, a processor includes processing cores, and a central control unit to: concurrently execute an outer control loop and an inner control loop, wherein the outer control loop is to monitor the processor as a whole, and wherein the inner control loop is to monitor a first processing core included in the processor; determine, based on the outer control loop, a first control action for the first processing core included in the processor; determine, based on the inner control loop, a second control action for the first processing core included in the processor; based on a comparison of the first control action and the second control action, select one of the first control action and the second control action as a selected control action; and apply the selected control action to the first processing core. Other embodiments are described and claimed.

公开(公告)号：US20200264996A1

公开(公告)日：2020-08-20

申请号：US16868603

申请日：2020-05-07

Applicant: Intel Corporation

Inventor： XIUTING C. MAN ,  JEREMY J. SHRALL ,  DEEPAK GANAPATHY ,  DORIT SHAPIRA

IPC: G06F13/24 ,  G06F1/3234 ,  G06F1/20 ,  G06F1/3296

Abstract: In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may be to: receive a plurality of values indicating thermal status values for a memory unit at multiple points in time across a first time window; determine a running average value based on the plurality of values indicating thermal status values in the memory unit; and in response to a determination that the running average value has exceeded a high thermal status threshold value, generate a thermal interrupt indicating a high thermal status event in the processor. Other embodiments are described and claimed.