公开(公告)号：US20200313722A1

公开(公告)日：2020-10-01

申请号：US16903354

申请日：2020-06-16

Applicant: Intel Corporation

Inventor： James Alexander McCall ,  Yunhui Chu ,  Christopher Philip Mozak ,  Derek M. Conrow ,  Christian Karl

IPC: H04B3/32 ,  H04B3/487

Abstract: An apparatus comprises a first data line coupled to a first driver; a second data line coupled to a second driver; and a crosstalk cancelation circuit comprising a third driver coupled between the first data line and the second data line, the crosstalk cancelation circuit to compensate for far end crosstalk introduced from the first data line to the second data line.

公开(公告)号：US09024665B2

公开(公告)日：2015-05-05

申请号：US13801759

申请日：2013-03-13

Applicant: Intel Corporation

Inventor： Derek M. Conrow ,  Aaron Martin ,  James A. McCall

IPC: H03K3/00 ,  H04B1/04

CPC classification number: H04B1/0475 ,  H03K19/018521 ,  H03K19/018585 ,  H03K19/018592 ,  H04L25/0278

Abstract: Described is an integrated circuit (IC) which comprises: an input-output (I/O) pad for coupling to a transmission line; a voltage mode driver coupled to the I/O pad, the voltage mode driver having a pull-up driver and a pull-down driver; and a current mode driver coupled to the I/O pad, the current mode driver operable to function in parallel to the voltage mode driver.

Abstract translation: 描述了一种集成电路（IC），其包括：用于耦合到传输线的输入 - 输出（I / O）焊盘; 耦合到I / O焊盘的电压模式驱动器，具有上拉驱动器和下拉驱动器的电压模式驱动器; 以及耦合到所述I / O焊盘的电流模式驱动器，所述电流模式驱动器可操作以与所述电压模式驱动器并联起作用。

公开(公告)号：US09152257B2

公开(公告)日：2015-10-06

申请号：US13730642

申请日：2012-12-28

Applicant: Intel Corporation

Inventor： James A. McCall ,  Kuljit S. Bains ,  Derek M. Conrow ,  Aaron Martin

IPC: H03K3/012 ,  G06F3/041 ,  H03K19/00 ,  H03K19/0175

CPC classification number: H03K19/0008 ,  G06F3/041 ,  G06F3/0412 ,  H03K19/0005 ,  H03K19/017509 ,  H03K19/017545

Abstract: An output driver includes control logic configured to switch on a pull-up circuit and a pull-down circuit to provide an output impedance for a logic low on a transmission line. The output driver includes a variable pull-up resistor. The control logic is configured to switch on the pull-up circuit to a first value of impedance to drive a logic high on the transmission line. The control logic is configured to switch on the pull-up circuit to a second value of impedance and to switch on the pull-down circuit to provide the output impedance to drive a logic low on the transmission line. The system could alternatively be configured for the inverse to switch on a combination of pull-up and pull-down circuits for a logic high, where the pull-down circuit is switched on for a logic low.

Abstract translation: 输出驱动器包括被配置为接通上拉电路和下拉电路以提供传输线路上的逻辑低电平的输出阻抗的控制逻辑。 输出驱动器包括一个可变上拉电阻。 控制逻辑被配置为将上拉电路接通到第一阻抗值，以驱动传输线上的逻辑高电平。 控制逻辑被配置为将上拉电路接通到第二阻抗值，并且接通下拉电路以提供输出阻抗以驱动传输线上的逻辑低电平。 可替代地，该系统可以被配置为用于将逻辑高的上拉电路和下拉电路的组合打开，其中下拉电路被接通为逻辑低电平。