公开(公告)号：US10467160B2

公开(公告)日：2019-11-05

申请号：US15719742

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Xiang Li ,  Yunhui Chu ,  Jun Liao ,  George Vergis ,  James A. McCall ,  Charles C. Phares ,  Konika Ganguly ,  Qin Li

IPC: G11C5/02 ,  G06F13/16 ,  G11C5/06 ,  G06F1/18 ,  H01R12/73 ,  G11C5/04 ,  G11C7/10

Abstract: A method is described. The method includes receiving DDR memory channel signals from a motherboard through a larger DIMM motherboard connector. The method includes routing the signals to one of first and second smaller form factor connectors. The method includes sending the DDR memory channel signals to a DIMM that is connected to the one of the first and second smaller form factor connectors.

公开(公告)号：US10262599B2

公开(公告)日：2019-04-16

申请号：US15468389

申请日：2017-03-24

Applicant: Intel Corporation

Inventor： John Lang ,  Yunhui Chu ,  Yanli Zhang ,  Zhiming J. Zhuang

IPC: G09G3/34

Abstract: In some examples, a display includes a plurality of display backlight groups, and one or more controller to determine one or more one-dimensional backlight group brightness level adjustments, to determine one or more two-dimensional backlight group brightness level adjustments, and to adjust a brightness of one or more of the backlight groups in response to content of a display image.

公开(公告)号：US09941643B2

公开(公告)日：2018-04-10

申请号：US14757951

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Yunhui Chu ,  Charles C. Phares ,  John M. Lynch

IPC: H01R29/00 ,  H01R13/703 ,  H01R13/24

CPC classification number: H01R13/7035 ,  G06F13/4086 ,  H01R12/7094 ,  H01R13/24 ,  H01R13/2435 ,  H01R13/6473 ,  H01R13/7034

Abstract: Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.

公开(公告)号：US20240088069A1

公开(公告)日：2024-03-14

申请号：US18260810

申请日：2021-02-26

Applicant: Intel Corporation

Inventor： Wenzhi Wang ,  Xiaoning Ye ,  Yunhui Chu ,  Chunfei Ye ,  James A. McCall

IPC: H01L23/66 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5386 ,  H01L25/18 ,  H10B80/00 ,  H01L2223/6627

Abstract: Disclosed herein are integrated circuit (IC) supports with microstrips, and related embodiments. For example, an IC support may include a plurality of microstrips and a plurality of conductive segments. Individual ones of the conductive segments may be at least partially over at least two microstrips, a dielectric material may be between the plurality of microstrips and the plurality of conductive segments, and the conductive segments are included in a tape.

公开(公告)号：US10965047B2

公开(公告)日：2021-03-30

申请号：US16431498

申请日：2019-06-04

Applicant: Intel Corporation

Inventor： Jong-Ru Guo ,  Yunhui Chu ,  Jun Liao ,  Kai Xiao ,  Jingbo Li ,  Yuanhong Zhao ,  Mo Liu ,  Beomtaek Lee ,  James A. McCall ,  Jaejin Lee ,  Xiaoning Ye ,  Zuoguo Wu ,  Xiang Li

IPC: H05K7/00 ,  H01R12/71 ,  H01R13/66 ,  H01R103/00

Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.

公开(公告)号：US20200313722A1

公开(公告)日：2020-10-01

申请号：US16903354

申请日：2020-06-16

Applicant: Intel Corporation

Inventor： James Alexander McCall ,  Yunhui Chu ,  Christopher Philip Mozak ,  Derek M. Conrow ,  Christian Karl

IPC: H04B3/32 ,  H04B3/487

Abstract: An apparatus comprises a first data line coupled to a first driver; a second data line coupled to a second driver; and a crosstalk cancelation circuit comprising a third driver coupled between the first data line and the second data line, the crosstalk cancelation circuit to compensate for far end crosstalk introduced from the first data line to the second data line.

公开(公告)号：US11116072B2

公开(公告)日：2021-09-07

申请号：US15817098

申请日：2017-11-17

Applicant: Intel Corporation

Inventor： Jun Liao ,  Zhen Zhou ,  James A. McCall ,  Jong-Ru Guo ,  Xiang Li ,  Yunhui Chu ,  Zuoguo Wu

IPC: H05K1/02 ,  H05K1/14 ,  H04B3/32 ,  H01L23/66

Abstract: An apparatus is described. The apparatus includes a semiconductor chip having cross-talk noise cancellation circuitry disposed between a disturber trace and a trace to be protected from cross-talk noise emanating from the disturber trace. The trace is to be coupled to a receiver disposed on a different semiconductor chip.

公开(公告)号：US20180254928A1

公开(公告)日：2018-09-06

申请号：US15446277

申请日：2017-03-01

Applicant: Intel Corporation

Inventor： Yunhui Chu ,  Fan Chen ,  John Lang ,  Charles Phares

IPC: H04L25/03

CPC classification number: H04L25/03165

Abstract: Aspects of the embodiments are directed to a data transmission receiver that includes a neural network circuit for resolving a received bit value. The data transmission receiver can be coupled to a data transmitter by a high speed data link. The neural network circuit can sample a bit value at multiple locations across the bit's unit interval. The neural network circuit can also sample bit values for neighboring bits to the interested bit at multiple sampling locations across unit intervals for the neighboring bits. The neural network circuit can determine the value of the interested bit from the samples of the waveform.

公开(公告)号：US20170264055A1

公开(公告)日：2017-09-14

申请号：US15607327

申请日：2017-05-26

Applicant: INTEL CORPORATION

Inventor： Yunhui Chu ,  Charles C. Phares ,  John M. Lynch

IPC: H01R13/703 ,  H01R13/24

CPC classification number: H01R13/7035 ,  G06F13/4086 ,  H01R12/7094 ,  H01R13/24 ,  H01R13/2435 ,  H01R13/6473 ,  H01R13/7034

Abstract: Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.

公开(公告)号：US20170187151A1

公开(公告)日：2017-06-29

申请号：US14757951

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Yunhui Chu ,  Charles C. Phares ,  John M. Lynch

IPC: H01R13/703 ,  H01R13/24

CPC classification number: H01R13/7035 ,  G06F13/4086 ,  H01R12/7094 ,  H01R13/24 ,  H01R13/2435 ,  H01R13/6473 ,  H01R13/7034

Abstract: Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.