THERMAL MANAGEMENT SYSTEMS HAVING PRESTRESSED BIASING ELEMENTS AND RELATED METHODS

    公开(公告)号:US20230022182A1

    公开(公告)日:2023-01-26

    申请号:US17710822

    申请日:2022-03-31

    IPC分类号: G06F1/20 H05K7/20

    摘要: Thermal management systems having pre-stressed biasing elements and related methods are disclosed. An example electronic component includes a circuit board, a processor coupled to the circuit board, and a thermally conductive structure positioned adjacent the processor. The thermally conductive structure is to dissipate heat generated by the processor. The electronic component includes a pre-stressed biasing element coupled to the thermally conductive structure and positioned between the processor and the thermally conductive structure. The pre-stressed biasing element is pre-stressed prior to attachment to the thermally conductive structure and the circuit board.

    HEATSINK WITH A SANDWICH PLATE CONSTRUCTION
    3.
    发明申请

    公开(公告)号:US20200337178A1

    公开(公告)日:2020-10-22

    申请号:US16914053

    申请日:2020-06-26

    申请人: Intel Corporation

    IPC分类号: H05K7/20 H05K1/02

    摘要: Particular embodiments described herein provide for an electronic device that can be configured to include a sandwich plate construction heatsink. The sandwich plate construction heatsink can include a cold plate, one or more heat pipes over the cold plate, and a top plate over the one or more heat pipes. The cold plate can include a channel to accommodate the one or more heat pipes and/or the top plate can include a channel to accommodate the one or more heat pipes. The cold plate can be over a heat source in the electronic device.

    Radiation shield around a component on a substrate

    公开(公告)号:US11081450B2

    公开(公告)日:2021-08-03

    申请号:US16585052

    申请日:2019-09-27

    申请人: Intel Corporation

    摘要: Particular embodiments described herein provide for an electronic device that can be configured to include a substrate, a radiation source on the substrate, a ground on the substrate, where the ground is located around the radiation source, and a heat spreader over the radiation source, where the heat spreader includes one or more ground coupling mechanisms that are in contact with the ground on the substrate. The one or more ground coupling mechanisms in contact with the ground on the substrate create a radiation shield that at least partially keeps radiation from the radiation source from extending past the substrate.

    RADIATION SHIELD AROUND A COMPONENT ON A SUBSTRATE

    公开(公告)号:US20200027844A1

    公开(公告)日:2020-01-23

    申请号:US16585052

    申请日:2019-09-27

    申请人: Intel Corporation

    摘要: Particular embodiments described herein provide for an electronic device that can be configured to include a substrate, a radiation source on the substrate, a ground on the substrate, where the ground is located around the radiation source, and a heat spreader over the radiation source, where the heat spreader includes one or more ground coupling mechanisms that are in contact with the ground on the substrate. The one or more ground coupling mechanisms in contact with the ground on the substrate create a radiation shield that at least partially keeps radiation from the radiation source from extending past the substrate.

    INDUCED WARPAGE OF A THERMAL CONDUCTOR
    8.
    发明申请

    公开(公告)号:US20190371683A1

    公开(公告)日:2019-12-05

    申请号:US16544097

    申请日:2019-08-19

    申请人: Intel Corporation

    IPC分类号: H01L21/66 H01L21/02 H01L23/34

    摘要: Particular embodiments described herein provide for a silicon layer, where the silicon layer includes a profile and a thermal conductor coupled to the silicon layer, where the thermal conductor includes one or more residual stresses. The thermal conductor is modified based on the one or more residual stress such that when pressure is applied to the thermal conductor, a profile of the thermal conductor at least approximately matches the profile of the silicon layer. In an example, the thermal conductor is modified by removing material from one or more areas of the thermal conductor and the thermal conductor is coupled to the silicon layer by one or more pressure inducing mechanisms.