公开(公告)号：US10110225B1

公开(公告)日：2018-10-23

申请号：US15341423

申请日：2016-11-02

Applicant: Intel Corporation

Inventor： Ker Yon Lau ,  Tat Hin Tan ,  Choong Kit Wong

IPC: H03K19/00 ,  H03K17/56

Abstract: An input/output (I/O) circuit for an integrated circuit includes an input-output terminal, a termination circuit and an impedance compensation circuit. The termination circuit includes a node that is coupled to the input-output terminal. The termination circuit exhibits substantially constant first impedance below a first frequency of signals received at the input-output terminal. Furthermore, the termination circuit exhibits second impedance that is less than the first impedance when signals having a second frequency that is higher than the first frequency are received at the input-output terminal. The impedance compensation circuit is coupled to the input-output terminal. The impedance compensation circuit compensates for differences between the first and second impendences when the signal having the second frequency that is higher than the first frequency is received at the input-output terminal.

公开(公告)号：US20150288355A1

公开(公告)日：2015-10-08

申请号：US13997594

申请日：2012-04-16

Applicant: INTEL CORPORATION

Inventor： Ker Yon Lau

IPC: H03K17/10 ,  H03K3/356 ,  H04B1/40 ,  H02M3/07

CPC classification number: H03K17/102 ,  H02M3/07 ,  H03K3/356113 ,  H04B1/40

Abstract: A charge pump assist circuit to assist a voltage level shifter to toggle an output based on an input. The charge pump assist circuit may be implemented to toggle the output at a higher rate than the voltage level shifter. The voltage level shifter may be biased with an undivided voltage rail, such as an operating voltage of the charge pump assist circuit, rather than a divided voltage rail, while maintaining or increasing a toggle rate. The charge pump assist circuit may include a non-overlapping control generator to generate non-overlapping differential controls, and may further include first and second charge pump multipliers to increase voltages of the differential controls by a multiple of the operating voltage.

Abstract translation: 电荷泵辅助电路，用于辅助电压电平移位器基于输入切换输出。 可以实现电荷泵辅助电路以比电压电平移位器更高的速率来切换输出。 电压电平移位器可以用不分割的电压轨（例如电荷泵辅助电路的工作电压）偏置，而不是分压电压轨，同时保持或提高肘节率。 电荷泵辅助电路可以包括不重叠的控制发生器以产生不重叠的差分控制，并且还可以包括第一和第二电荷泵乘法器，以将差分控制的电压增加多个工作电压。

公开(公告)号：US10110229B1

公开(公告)日：2018-10-23

申请号：US15615704

申请日：2017-06-06

Applicant: Intel Corporation

Inventor： Ker Yon Lau

IPC: H03K19/003 ,  G11C7/04

Abstract: Systems and methods are related to selectively inverting circuit paths of an integrated circuit to reduce errors due to aging. An integrated circuit includes a first circuit path that receives an input signal and outputs a first output signal, a first selective inverter that receives the first output signal and outputs a first inverter output signal; and a second circuit path that receives the first selective inverter output signal and outputs a second output signal. In a first mode, the first selective inverter does not invert the first output signal and outputs the first output signal as the first selective inverter output signal. In a second mode, the first selective inverter inverts the first output signal and outputs an inverse of the first output signal as the first selective inverter output signal.

公开(公告)号：US09948293B1

公开(公告)日：2018-04-17

申请号：US15346455

申请日：2016-11-08

Applicant: Intel Corporation

Inventor： Ker Yon Lau

IPC: H03K3/00 ,  H03K17/687

CPC classification number: H03K17/6872 ,  H03K17/6874

Abstract: An integrated circuit includes first and second transmitter driver circuits. The first transmitter driver circuit includes a first pull-up circuit and a first pull-down circuit that are configured as a first voltage mode driver to drive a first single-ended output signal to a first pad during a voltage mode operation. The second transmitter driver circuit includes a second pull-up circuit and a second pull-down circuit that are configured as a second voltage mode driver to drive a second single-ended output signal to a second pad during the voltage mode operation. The first and second pull-up circuits and the first and second pull-down circuits drive a differential output signal to the first and second pads during a current mode operation when the first and second transmitter driver circuits are configured as a current mode driver.

公开(公告)号：US09608636B2

公开(公告)日：2017-03-28

申请号：US14129238

申请日：2013-09-24

Applicant: INTEL CORPORATION

Inventor： Ker Yon Lau

IPC: H03K19/0185 ,  H03K19/003 ,  H03K19/0175 ,  H03K5/08 ,  G06F1/26 ,  H03K17/16

CPC classification number: H03K19/018521 ,  G06F1/26 ,  H03K5/08 ,  H03K17/162 ,  H03K19/00361 ,  H03K19/00369 ,  H03K19/017509 ,  H03K2217/0018 ,  H03K2217/0036 ,  H03K2217/0054

Abstract: Described is an apparatus comprising a first node to receive signal; a second node to provide an output signal; a voltage limiter circuit operating under a first supply voltage, the voltage limiter coupled to the first and the second nodes; and a bypass circuit operating under the first supply voltage, the bypass circuit coupled to the voltage limiter circuit and is capable of being enabled to electrically short the first node to the second node.