公开(公告)号：US20170237444A1

公开(公告)日：2017-08-17

申请号：US15434520

申请日：2017-02-16

Applicant: Intel Corporation

Inventor： Fangxing Wei ,  Setul M. Shah ,  Michael J. ALLEN ,  Khushal N. Chandan

IPC: H03L7/081 ,  G11C7/22 ,  G11C7/10

CPC classification number: H03L7/0814 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  H03L7/0816 ,  H03L7/0818

Abstract: Phase compensation in an I/O (input/output) circuit includes variable, programmable slope. A phase compensation circuit can apply phase compensation of one slope and dynamically change the slope of the phase compensation to allow for better tracking of environmental conditions. The phase compensation circuit can generate a linear code to apply phase compensation to lock phase of an I/O signal to a phase of a timing signal. The circuit selectively adjusts the linear code with a variable, programmable slope, where the slope defines how much phase compensation is applied per unit change in the linear code. The circuit applies the adjusted linear code to a lock loop to lock the phase of the I/O signal to the phase of the timing signal.

公开(公告)号：US20170186471A1

公开(公告)日：2017-06-29

申请号：US14998185

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Shekoufeh QAWAMI ,  Michael J. ALLEN ,  Rajesh SUNDARAM

IPC: G11C7/22

CPC classification number: G11C7/222 ,  G06F13/1689 ,  G11C29/022 ,  G11C29/023 ,  G11C29/1201 ,  G11C29/12015 ,  G11C2207/2254 ,  Y02D10/14

Abstract: A memory device performs DLL (delay locked loop) calibration in accordance with a DLL calibration mode configured for the memory device. A host controller can configure the calibration mode based on operating conditions for the memory device. The memory device includes an input/output (I/O) interface circuit and a delay locked loop (DLL) circuit coupled to control I/O timing of the I/O interface. A control circuit of the memory device selectively enables and disables DLL calibration in accordance with the DLL calibration mode. When selectively enabled, the DLL calibration is to operate at a time interval identified by the DLL calibration mode, and when selectively disabled, the DLL calibration is to cease or refrain from DLL calibration operations.