System and method for universal serial bus (USB) protocol debugging

    公开(公告)号:US10007589B2

    公开(公告)日:2018-06-26

    申请号:US14865266

    申请日:2015-09-25

    申请人: Intel Corporation

    CPC分类号: G06F11/2221 G06F11/221

    摘要: In one embodiment an electronic device includes a processor and at least one universal serial bus (USB) subsystem comprising logic, at least partially including hardware logic, configured to detect a connection from a remote electronic device to a USB port of the electronic device, determine whether the USB port of the electronic device is to act as an upstream facing port or a downstream facing port, and in response to a determination that the USB port of the electronic device is to be configured as an upstream facing port, to implement a port mapping process to map the USB port to one of a device controller or a debug controller. Other embodiments may be described.

    Privacy protected input-output port control

    公开(公告)号:US09977888B2

    公开(公告)日:2018-05-22

    申请号:US14978578

    申请日:2015-12-22

    申请人: Intel Corporation

    IPC分类号: G06F21/00 G06F21/32 G06F21/62

    CPC分类号: G06F21/32 G06F21/62

    摘要: Systems and techniques for privacy protected input-output port control are described herein. In an example, an indication may be obtained that a protected port is disabled. A set of application attributes stored in a secure memory location may be compared to a set of attested application attributes to create a verification flag. At least one port attribute of the protected port may be obtained based on the verification flag. The protected port may be enabled using the at least one port attribute. Other examples, for controlling an input-output port using computer firmware and trusted execution techniques are further disclosed.

    SYSTEM AND METHOD FOR UNIVERSAL SERIAL BUS (USB) PROTOCOL DEBUGGING

    公开(公告)号:US20170091060A1

    公开(公告)日:2017-03-30

    申请号:US14865266

    申请日:2015-09-25

    申请人: Intel Corporation

    IPC分类号: G06F11/273 G06F11/22

    CPC分类号: G06F11/2221 G06F11/221

    摘要: In one embodiment an electronic device includes a processor and at least one universal serial bus (USB) subsystem comprising logic, at least partially including hardware logic, configured to detect a connection from a remote electronic device to a USB port of the electronic device, determine whether the USB port of the electronic device is to act as an upstream facing port or a downstream facing port, and in response to a determination that the USB port of the electronic device is to be configured as an upstream facing port, to implement a port mapping process to map the USB port to one of a device controller or a debug controller. Other embodiments may be described.

    ADDITIONAL SECURED EXECUTION ENVIRONMENT WITH SR-IOV AND XHCI-IOV
    6.
    发明申请
    ADDITIONAL SECURED EXECUTION ENVIRONMENT WITH SR-IOV AND XHCI-IOV 有权
    使用SR-IOV和XHCI-IOV的附加安全执行环境

    公开(公告)号:US20160283425A1

    公开(公告)日:2016-09-29

    申请号:US14671465

    申请日:2015-03-27

    申请人: Intel Corporation

    摘要: An apparatus is described herein. The apparatus includes a Universal Serial Bus (USB) component and a controller interface. The controller interface is to allocate register space for interfacing with the USB component and the USB component is virtualized into multiple instantiations. The apparatus also includes a secure environment, and the secure environment further virtualizes the multiple instantiations such that the multiple instantiations are owned by the secure environment.

    摘要翻译: 这里描述了一种装置。 该装置包括通用串行总线(USB)组件和控制器接口。 控制器接口是分配与USB组件接口的寄存器空间,并将USB组件虚拟化为多个实例。 该装置还包括安全环境,并且安全环境进一步虚拟化多个实例,使得多个实例由安全环境所拥有。