公开(公告)号：US20210304820A1

公开(公告)日：2021-09-30

申请号：US16828843

申请日：2020-03-24

Applicant: Intel Corporation

Inventor： Arash HAZEGHI ,  Pranav KALAVADE ,  Rohit S. SHENOY ,  Hsiao-Yu CHANG

IPC: G11C16/10 ,  G06F3/06 ,  G01K3/00

Abstract: A method is described. The method includes performing the following on a flash memory chip: measuring a temperature of the flash memory chip; and, changing a program step size voltage of the flash memory chip because the temperature of the flash memory chip has changed.

公开(公告)号：US20220366962A1

公开(公告)日：2022-11-17

申请号：US17322724

申请日：2021-05-17

Applicant: Intel Corporation

Inventor： Rifat FERDOUS ,  Sung-Taeg KANG ,  Rohit S. SHENOY ,  Ali KHAKIFIROOZ ,  Dipanjan BASU

IPC: G11C11/408 ,  G11C11/4074 ,  G11C11/409 ,  G11C7/04

Abstract: After reading a 3D (three dimensional) NAND array, the wordlines of the 3D NAND array can be transitioned to ground in a staggered manner. The 3D NAND array includes a 3D stack with multiple wordlines vertically stacked, including a bottom-most wordline, a top-most wordline, and middle wordlines between the bottom-most wordline and the top-most wordline. A controller that controls the reading can set the multiple wordlines to a read voltage for reading operations and then transition a selected wordline of the multiple wordlines from the read voltage to ground prior to transitioning the other wordlines to ground. Thus, the controller will transition the other wordlines from the read voltage to ground after a delay.

公开(公告)号：US20210117270A1

公开(公告)日：2021-04-22

申请号：US17133995

申请日：2020-12-24

Applicant: Intel Corporation

Inventor： Krishna K. PARAT ,  Ravi H. MOTWANI ,  Rohit S. SHENOY ,  Ali KHAKIFIROOZ

IPC: G06F11/10 ,  G11C16/26 ,  G11C11/56

Abstract: Error correction coding (ECC) mis-corrected reads, if undetected, result in silent data corruption of a non-volatile memory device. Overcoming ECC mis-corrected reads is based on a read signature of a result of reading a page in the non-volatile memory device. An ECC mis-correct logic counts the number of bits in the end-most buckets into which the bits of the result is divided. End-most buckets that are overpopulated or starved reveal a tell-tale read signature of an ECC mis-correct. The ECC mis-correct is likely to occur when the read reference voltage level used to read the page is shifted in one direction or another to an extreme amount that risks reading data from a different page. Detecting ECC mis-corrected reads can be used to overcome the ECC mis-corrects and mitigate silent data corruption.

公开(公告)号：US20190103159A1

公开(公告)日：2019-04-04

申请号：US15720492

申请日：2017-09-29

Applicant: INTEL CORPORATION

Inventor： Ali KHAKIFIROOZ ,  Rohit S. SHENOY ,  Pranav KALAVADE ,  Aliasgar S. MADRASWALA ,  Yogesh B. WAKCHAURE

IPC: G11C11/56 ,  G11C16/34 ,  G11C16/04

Abstract: Provided are techniques for resuming storage die programming after power loss. In response to receipt of an indication of the power loss, data that was to be programmed to multi-level cell NAND blocks are copied to single level cell NAND blocks and a pulse number at which programming was interrupted is stored. In response to receipt of an indication to resume from the power loss, the data is copied from the single level cell NAND blocks to a page buffer, the pulse number is retrieved, and programming of the multi-level cell NAND blocks is resumed at the retrieved pulse number using the data in the page buffer.