公开(公告)号：US20220357951A1

公开(公告)日：2022-11-10

申请号：US17872927

申请日：2022-07-25

Applicant: Intel Corporation

Inventor： Vy Vo ,  Dipanjan Sengupta ,  Mariano Tepper ,  Javier Sebastian Turek

IPC: G06F9/32 ,  G06F9/50 ,  G06F12/0815 ,  G06K9/62 ,  G06N3/063 ,  G06N3/04 ,  G06F11/34

Abstract: An example system includes memory; a central processing unit (CPU) to execute first operations; in-memory execution circuitry in the memory; and detector software to cause offloading of second operations to the in-memory execution circuitry, the in-memory execution circuitry to execute the second operations in parallel with the CPU executing the first operations.

公开(公告)号：US20210001884A1

公开(公告)日：2021-01-07

申请号：US16914298

申请日：2020-06-27

Applicant: Intel Corporation

Inventor： Ignacio J. Alvarez ,  Vy Vo ,  Javier Felip Leon ,  Javier Perez-Ramirez ,  Javier Sebastian Turek ,  Mariano Tepper ,  David Israel Gonzalez Aguirre

IPC: B60W60/00 ,  G06N3/08 ,  G06N5/02 ,  G01C21/34 ,  B60W30/095 ,  B60W40/06 ,  B60W30/09

Abstract: Systems, apparatuses and methods may provide for technology that generates, via a first neural network such as a grid network, a first vector representing a prediction of future behavior of an autonomous vehicle based on a current vehicle position and a vehicle velocity. The technology may also generate, via a second neural network such as an obstacle network, a second vector representing a prediction of future behavior of an external obstacle based on a current obstacle position and an obstacle velocity, and determine, via a third neural network such as a place network, a future trajectory for the vehicle based on the first vector and the second vector, the future trajectory representing a sequence of planned future behaviors for the vehicle. The technology may also issue actuation commands to navigate the autonomous vehicle based on the future trajectory for the vehicle.

公开(公告)号：US20200326934A1

公开(公告)日：2020-10-15

申请号：US16913756

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Mariano Tepper ,  Bryn Keller ,  Mihai Capota ,  Vy Vo ,  Nesreen Ahmed ,  Theodore Willke

IPC: G06F8/75 ,  G06N3/04 ,  G06N3/08

Abstract: Systems, apparatuses and methods may provide for technology that generates a dependence graph based on a plurality of intermediate representation (IR) code instructions associated with a compiled program code, generates a set of graph embedding vectors based on the plurality of IR code instructions, and determines, via a neural network, one of an analysis of the compiled program code or an enhancement of the program code based on the dependence graph and the set of graph embedding vectors. The technology may provide a graph attention neural network that includes a recurrent block and at least one task-specific neural network layer, the recurrent block including a graph attention layer and a transition function. The technology may also apply dynamic per-position recurrence-halting to determine a number of recurring steps for each position in the recurrent block based on adaptive computation time.

公开(公告)号：US11853766B2

公开(公告)日：2023-12-26

申请号：US17872927

申请日：2022-07-25

Applicant: Intel Corporation

Inventor： Vy Vo ,  Dipanjan Sengupta ,  Mariano Tepper ,  Javier Sebastian Turek

IPC: G06F9/38 ,  G06F9/32 ,  G06F9/50 ,  G06F12/0815 ,  G06N3/063 ,  G06F11/34 ,  G06F18/21 ,  G06N3/045

CPC classification number: G06F9/3877 ,  G06F9/321 ,  G06F9/5016 ,  G06F9/5066 ,  G06F11/3457 ,  G06F12/0815 ,  G06F18/217 ,  G06N3/045 ,  G06N3/063 ,  G06F2212/1021

Abstract: An example system includes memory; a central processing unit (CPU) to execute first operations; in-memory execution circuitry in the memory; and detector software to cause offloading of second operations to the in-memory execution circuitry, the in-memory execution circuitry to execute the second operations in parallel with the CPU executing the first operations.

公开(公告)号：US20200326696A1

公开(公告)日：2020-10-15

申请号：US16913845

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Ignacio Alvarez ,  Todd Anderson ,  Vy Vo ,  Javier Felip Leon ,  Javier Perez-Ramirez

IPC: G05B23/02 ,  G05B13/02

Abstract: Systems, apparatuses and methods may provide for technology that obtains categorization information and corresponding uncertainty information from a perception subsystem, wherein the categorization information and the corresponding uncertainty information are to be associated with an object in an environment. The technology may also determine whether the corresponding uncertainty information satisfies one or more relevance criteria, and automatically control the perception subsystem to increase an accuracy in one or more subsequent categorizations of the object if the corresponding uncertainty information satisfies the one or more relevance criteria. In one example, determining whether the corresponding uncertainty information satisfies the relevance criteria includes taking a plurality of samples from the categorization information and the corresponding uncertainty information, generating a plurality of actuation plans based on the plurality of samples, and determining a safety deviation across the plurality of actuation plans, wherein the relevance criteria are satisfied if the safety deviation exceeds a threshold.

公开(公告)号：US11640295B2

公开(公告)日：2023-05-02

申请号：US16913756

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Mariano Tepper ,  Bryn Keller ,  Mihai Capota ,  Vy Vo ,  Nesreen Ahmed ,  Theodore Willke

IPC: G06F8/75 ,  G06N3/08 ,  G06N3/04

Abstract: Systems, apparatuses and methods may provide for technology that generates a dependence graph based on a plurality of intermediate representation (IR) code instructions associated with a compiled program code, generates a set of graph embedding vectors based on the plurality of IR code instructions, and determines, via a neural network, one of an analysis of the compiled program code or an enhancement of the program code based on the dependence graph and the set of graph embedding vectors. The technology may provide a graph attention neural network that includes a recurrent block and at least one task-specific neural network layer, the recurrent block including a graph attention layer and a transition function. The technology may also apply dynamic per-position recurrence-halting to determine a number of recurring steps for each position in the recurrent block based on adaptive computation time.

公开(公告)号：US11493914B2

公开(公告)日：2022-11-08

申请号：US16913845

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Ignacio Alvarez ,  Todd Anderson ,  Vy Vo ,  Javier Felip Leon ,  Javier Perez-Ramirez

IPC: G05B23/02 ,  G05B13/02

Abstract: Systems, apparatuses and methods may provide for technology that obtains categorization information and corresponding uncertainty information from a perception subsystem, wherein the categorization information and the corresponding uncertainty information are to be associated with an object in an environment. The technology may also determine whether the corresponding uncertainty information satisfies one or more relevance criteria, and automatically control the perception subsystem to increase an accuracy in one or more subsequent categorizations of the object if the corresponding uncertainty information satisfies the one or more relevance criteria. In one example, determining whether the corresponding uncertainty information satisfies the relevance criteria includes taking a plurality of samples from the categorization information and the corresponding uncertainty information, generating a plurality of actuation plans based on the plurality of samples, and determining a safety deviation across the plurality of actuation plans, wherein the relevance criteria are satisfied if the safety deviation exceeds a threshold.

公开(公告)号：US20200326949A1

公开(公告)日：2020-10-15

申请号：US16914293

申请日：2020-06-27

Applicant: Intel Corporation

Inventor： Vy Vo ,  Dipanjan Sengupta ,  Mariano Tepper ,  Javier Sebastian Turek

IPC: G06F9/32 ,  G06F9/50 ,  G06F12/0815 ,  G06F11/34 ,  G06K9/62 ,  G06N3/063 ,  G06N3/04

Abstract: Systems, apparatuses and methods may provide for technology that recognizes, via a neural network, a pattern of memory access and compute instructions based on an input set of machine instructions, determines, via a neural network, a sequence of instructions to be offloaded for execution by the secondary computing device based on the recognized pattern of memory access and compute instructions, and translates the sequence of instructions to be offloaded from instructions executable by a central processing unit (CPU) into instructions executable by the secondary computing device.

公开(公告)号：US11702105B2

公开(公告)日：2023-07-18

申请号：US16914298

申请日：2020-06-27

Applicant: Intel Corporation

Inventor： Ignacio J. Alvarez ,  Vy Vo ,  Javier Felip Leon ,  Javier Perez-Ramirez ,  Javier Sebastian Turek ,  Mariano Tepper ,  David Israel Gonzalez Aguirre

IPC: B60W60/00 ,  G06N3/08 ,  G06N5/02 ,  G01C21/34 ,  B60W30/095 ,  B60W40/06 ,  B60W30/09

CPC classification number: B60W60/0015 ,  B60W30/09 ,  B60W30/0956 ,  B60W40/06 ,  B60W60/0011 ,  G01C21/3407 ,  G06N3/08 ,  G06N5/02 ,  B60W2552/00 ,  B60W2554/4041 ,  B60W2554/4042 ,  B60W2555/00

Abstract: Systems, apparatuses and methods may provide for technology that generates, via a first neural network such as a grid network, a first vector representing a prediction of future behavior of an autonomous vehicle based on a current vehicle position and a vehicle velocity. The technology may also generate, via a second neural network such as an obstacle network, a second vector representing a prediction of future behavior of an external obstacle based on a current obstacle position and an obstacle velocity, and determine, via a third neural network such as a place network, a future trajectory for the vehicle based on the first vector and the second vector, the future trajectory representing a sequence of planned future behaviors for the vehicle. The technology may also issue actuation commands to navigate the autonomous vehicle based on the future trajectory for the vehicle.

公开(公告)号：US20220318088A1

公开(公告)日：2022-10-06

申请号：US17845390

申请日：2022-06-21

Applicant: Intel Corporation

Inventor： Javier Sebastian Turek ,  Vy Vo ,  Javier Perez-Ramirez ,  Marcos Carranza ,  Mateo Guzman ,  Cesar Martinez-Spessot ,  Dario Oliver

IPC: G06F11/07 ,  G06F40/279 ,  G06N3/02 ,  G06F11/30

Abstract: Systems, apparatuses and methods may provide for technology that identifies a sequence of events associated with a computer architecture, categorizes, with a natural language processing system, the sequence of events into a sequence of words, identifying an anomaly based on the sequence of words and triggering an automatic remediation process in response to an identification of the anomaly.