公开(公告)号：US20040188823A1

公开(公告)日：2004-09-30

申请号：US10709012

申请日：2004-04-07

申请人： International Business Machines Corporation

发明人： Glenn G. Daves ,  Jason Frankel ,  William F. Shutler ,  Anthony Wayne Sigler ,  Herbert I. Stoller ,  John Vetrero ,  Cathy Ann Zadany

IPC分类号： H01L023/48 ,  H01L023/52 ,  H05K001/11 ,  H05K001/14

CPC分类号： H01L24/17 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H05K1/0289 ,  H05K1/112

摘要： A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer translating the first grid in an x-axis direction. A second translation layer is coupled to the first translation layer, the second translation layer for translating said wiring connections from the first grid in a y-axis direction, the y-axis direction being orthogonal to the x-axis direction. The second translation layer is further coupled to the second grid.

摘要翻译： 公开了一种用于将布线连接从第一网格中的点转换到芯片载体模块中的第二网格中的相应点的慢跑结构。 在示例性实施例中，该结构包括耦合到第一格栅的第一平移层，第一平移层沿x轴方向平移第一格栅。 第二平移层耦合到第一平移层，第二平移层用于在y轴方向上从第一栅格平移所述布线连接，y轴方向与x轴方向正交。 第二平移层还耦合到第二栅极。

公开(公告)号：US20020180013A1

公开(公告)日：2002-12-05

申请号：US09870531

申请日：2001-05-31

申请人： International Business Machines Corporation

发明人： Peter J. Brofman ,  Glenn G. Daves ,  Sudipta K. Ray ,  Herbert I. Stoller

IPC分类号： H01L021/44

CPC分类号： H01L21/6835 ,  H01L21/486 ,  H01L24/16 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/16237 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00

摘要： A silicon based package (SBP) is formed starting with a thick wafer, which serves as the base for the SBP, composed of silicon which has a first surface and a reverse surface which are planar. Then form an interconnection structure including multilayer conductor patterns over the first surface. Form a temporary bond between the SBP and a wafer holder, with the wafer holder being a rigid structure. Thin the wafer to a desired thickness to form an Ultra Thin Silicon Wafer (UTSW) for the SBP. Forming via holes which extend through the UTSW, forming metallization in the via holes which extends through the UTSW, making electrical contact to the interconnection structure on the first surface. Then bond the metallization in the via holes to pads of a carrier.

摘要翻译： 基于硅的封装（SBP）从用作SBP的基底的厚晶片开始形成，所述基板由具有平坦的第一表面和反面的硅组成。 然后在第一表面上形成包括多层导体图案的互连结构。 在SBP和晶片保持器之间形成临时结合，晶片保持器是刚性结构。 将晶片细化至所需厚度，以形成SBP的超薄硅片（UTSW）。 形成穿过UTSW的孔，在穿过UTSW的通孔中形成金属化，与第一表面上的互连结构电接触。 然后将通孔中的金属化物接合到载体的焊盘。