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公开(公告)号：US10169288B2
公开(公告)日：2019-01-01
申请号：US15140034
申请日：2016-04-27
IPC分类号： G06F15/173 , G06F15/16 , G06F15/163 , H04B10/25 , H04L5/14
摘要： Node interconnect architectures to implement a high performance supercomputer are provided. For example, a node interconnect architecture for connecting a multitude of nodes (or processors) of a supercomputer is implemented using an all-to-all electrical and optical connection network which provides two independent communication paths between any two processors of the supercomputer, wherein a communication path includes at most two electrical links and one optical link.
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公开(公告)号：US09568960B2
公开(公告)日：2017-02-14
申请号：US14627657
申请日：2015-02-20
IPC分类号： H01L23/473 , G06F1/18 , G06F1/20 , H01L23/367 , H01L23/498
CPC分类号： G06F1/185 , G06F1/20 , G06F2200/201 , H01L23/367 , H01L23/473 , H01L23/49816 , H01L23/49838 , H01L24/94 , H01L24/97 , H01L25/50 , H01L2224/04026 , H01L2224/05583 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/13109 , H01L2224/13116 , H01L2224/16227 , H01L2224/24137 , H01L2224/29116 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81805 , H01L2224/92125 , H01L2224/92242 , H01L2224/94 , H01L2224/97 , H01L2924/1431 , H01L2924/1434 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2224/83 , H01L2924/0105 , H01L2224/81
摘要： A semiconductor structure includes a substrate with cooling layers, cooling channels, coolant inlets and outlets in fluid communication with the cooling channels, and a device layer on the cooling layers with one or more connection points and a device layer area. The device layer thermal coefficient of expansion is substantially equal to that of the cooling layers. A plurality of laminate substrates are disposed on, and electrically attached to, the device layer. The laminate substrate thermal coefficient of expansion differs from that of the device layer, each laminate substrate is smaller than the device layer portion to which it is attached, and each laminate substrate includes gaps between sides of adjacent laminate substrates. The laminate substrates are not electrically or mechanically connected to each other across the gaps therebetween and the laminate substrates are small enough to prevent warping of the device, interconnection and cooling layers due to thermal expansion.
摘要翻译： 半导体结构包括具有冷却层的衬底，冷却通道，与冷却通道流体连通的冷却剂入口和出口，以及具有一个或多个连接点和器件层区域的冷却层上的器件层。 器件层的热膨胀系数基本上等于冷却层的热膨胀系数。 多个层叠基板设置在器件层上并电连接到器件层。 叠层基板的热膨胀系数与装置层的热膨胀系数不同，每个层压基板的尺寸小于与其相连的装置层部分，并且各层叠基板在相邻层叠基板的侧面之间具有间隙。 层压基板在它们之间的间隙彼此不电或机械连接，并且层叠基板足够小以防止由于热膨胀而引起的装置，互连和冷却层翘曲。
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公开(公告)号：US20180062664A1
公开(公告)日：2018-03-01
申请号：US15247192
申请日：2016-08-25
IPC分类号： H03M7/46
摘要： Technical solutions are described for determining a population count of an input bit-string. In an example, a population count circuit receives a single n-bit input data word including of bits A[n−1:0]. The population count circuit isolates a pair of 4-bit nibbles. The population count circuit includes a carryless counter circuit that determines a pair of counts of 1s, one for each 4-bit nibble. The population circuit further includes an adder circuit that determines the population count by summing the pair of counts of 1s from the carryless counter circuit, where the adder circuit determines the most significant bit (MSB) of the sum based on the MSBs of the counts of 1s only, without depending on carry propagation.
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公开(公告)号：US20160241340A1
公开(公告)日：2016-08-18
申请号：US15140034
申请日：2016-04-27
CPC分类号： G06F15/173 , G06F15/161 , G06F15/163 , G06F15/17337 , H04B10/2503 , H04L5/14
摘要： Node interconnect architectures to implement a high performance supercomputer are provided. For example, a node interconnect architecture for connecting a multitude of nodes (or processors) of a supercomputer is implemented using an all-to-all electrical and optical connection network which provides two independent communication paths between any two processors of the supercomputer, wherein a communication path includes at most two electrical links and one optical link.
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公开(公告)号：US10171105B2
公开(公告)日：2019-01-01
申请号：US15247192
申请日：2016-08-25
摘要： Technical solutions are described for determining a population count of an input bit-string. In an example, a population count circuit receives a single n-bit input data word including of bits A[n−1:0]. The population count circuit isolates a pair of 4-bit nibbles. The population count circuit includes a carryless counter circuit that determines a pair of counts of 1s, one for each 4-bit nibble. The population circuit further includes an adder circuit that determines the population count by summing the pair of counts of 1s from the carryless counter circuit, where the adder circuit determines the most significant bit (MSB) of the sum based on the MSBs of the counts of 1s only, without depending on carry propagation.
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