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公开(公告)号:US20210135104A1
公开(公告)日:2021-05-06
申请号:US16671748
申请日:2019-11-01
发明人: Injo Ok , Kevin W. Brew , Timothy M. Philip , Muthumanickam Sankarapandian , Sanjay C. Mehta , Nicole Saulnier , Steven M. Mcdermott
摘要: A phase change material memory device is provided. The phase change material memory device includes one or more electrical contacts in a substrate, and a dielectric cover layer on the electrical contacts and substrate. The phase change material memory device further includes a lower conductive shell in a trench above one of the one or more electrical contacts, and an upper conductive shell on the lower conductive shell in the trench. The phase change material memory device further includes a conductive plug filling the upper conductive shell. The phase change material memory device further includes a liner layer on the dielectric cover layer and conductive plug, and a phase change material block on the liner layer on the dielectric cover layer and in the trench.
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公开(公告)号:US10725454B2
公开(公告)日:2020-07-28
申请号:US16186980
申请日:2018-11-12
发明人: Ravi K. Bonam , Nicole Saulnier , Michael Crouse , Derren N. Dunn
IPC分类号: G05B19/41 , G05B19/4155
摘要: Techniques for modifying a mask fabrication process based the identification of an abnormality in a pattern of a fabricated lithography mask are disclosed including comparing a fabricated lithography mask to a lithography mask design where the fabricated lithography mask is fabricated based at least in part on the lithography mask design using a mask fabrication process. An abnormality in a pattern of the fabricated lithography mask relative to a corresponding one of the plurality of patterns in the lithography mask design is identified based at least in part on the comparison of the fabricated lithography mask to the lithography mask design. A calibrated mask model is generated based at least in part on the identified abnormality in the pattern of the fabricated lithography mask and the mask fabrication process is modified based at least in part on the calibrated mask model.
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公开(公告)号:US20200161543A1
公开(公告)日:2020-05-21
申请号:US16194662
申请日:2018-11-19
发明人: Ruqiang Bao , Nicole Saulnier
IPC分类号: H01L45/00
摘要: A phase change material (“PCM”) device is described. A non-limiting example of the PCM device includes a bottom electrode including a low resistivity material and a PCM material over the bottom electrode. The PCM device has a top electrode over the PCM material.
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公开(公告)号:US20180025943A1
公开(公告)日:2018-01-25
申请号:US15677539
申请日:2017-08-15
发明人: Sean D. Burns , Lawrence A. Clevenger , Matthew E. Colburn , Sivananda K. Kanakasabapathy , Yann A. M. Mignot , Christopher J. Penny , Roger A. Quon , Nicole Saulnier
IPC分类号: H01L21/768
CPC分类号: H01L21/76897 , H01L21/76802 , H01L21/76811 , H01L21/76816 , H01L21/76831 , H01L21/76843 , H01L21/76877 , H01L23/5226 , H01L23/528
摘要: A method for forming conductive contacts on a wafer comprises forming a first hardmask, planarizing layer, second hardmask, and a layer of sacrificial mandrel material, and removing portions of the layer of sacrificial mandrel material to expose portions of the second hardmask and form a first and second sacrificial mandrel. Spacers are formed adjacent to the sacrificial mandrels. A filler material is deposited on the second hardmask, and a first mask is formed on the filler material. An exposed portion of the second sacrificial mandrel is removed to form a first cavity. The depth of the first cavity is increased. The first mask, portions of the first and second sacrificial mandrels, the filler material, portions of the second hardmask, the spacers, portions of the planarization layer and the first hardmask are removed. A second cavity is formed and the first and second cavities are filled with a conductive material.
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公开(公告)号:US09852946B1
公开(公告)日:2017-12-26
申请号:US15176279
申请日:2016-06-08
发明人: Sean D. Burns , Lawrence A. Clevenger , Matthew E. Colburn , Sivananda K. Kanakasabapathy , Yann A. M. Mignot , Christopher J. Penny , Roger A. Quon , Nicole Saulnier
IPC分类号: H01L21/4763 , H01L21/768
CPC分类号: H01L21/76897 , H01L21/76802 , H01L21/76843
摘要: A method for forming conductive lines on a wafer comprises forming a first sacrificial mandrel and a second sacrificial mandrel. Spacers are formed adjacent to the first and second sacrificial mandrels. A filler material is deposited on the second hardmask. A first mask is formed on a portion of the second sacrificial mandrel. A first cavity and a second cavity are formed that expose portions of the second hardmask, and exposed portions of the second mask and exposed portions of the filler material are removed to expose portions of the first hardmask. Exposed portions of the first hardmask, the planarizing layer and the first hardmask are removed to expose portions of the insulator layer. Exposed portions of the insulator layer are removed to form a trench in the insulator layer and the trench is filled with a conductive material.
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公开(公告)号:US20230075622A1
公开(公告)日:2023-03-09
申请号:US17447073
申请日:2021-09-08
发明人: Injo Ok , Andrew Herbert Simon , Kevin W. Brew , Muthumanickam Sankarapandian , Steven Michael McDermott , Nicole Saulnier
IPC分类号: H01L45/00
摘要: A phase change memory bridge cell comprising a dielectric layer located on top of a at least one electrode, wherein a trench is located in the dielectric layer. A first liner located at the bottom of the trench in the dielectric layer and the first liner is located on the sidewalls of the dielectric layer that forms the sidewalls of the trench. A phase change memory material located on top of the first liner, wherein a top surface of the phase change memory material is aligned with a top surface of the dielectric layer, wherein the dielectric layer is located adjacent to and surrounding the vertical sidewalls of the phase change memory material, wherein a top surface of the phase change memory material is flush with a top surface of the dielectric layer.
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公开(公告)号:US11456417B2
公开(公告)日:2022-09-27
申请号:US17104360
申请日:2020-11-25
发明人: Kevin W. Brew , Injo Ok , Iqbal Rashid Saraf , Nicole Saulnier , Matthew Joseph BrightSky , Robert L. Bruce
摘要: A mushroom type phase change memory (PCM) cell includes a projection liner located between a PCM volume and a bottom electrode. The projection liner has been retained from a layer previously utilized as an etch stop layer during the fabrication of PCM cell and/or the fabrication of the higher level IC device. The projection liner may extend beyond the PCM sidewall(s) or side boundary. This section of the projection liner may be located or buried under a dielectric or an encapsulation spacer and may increase thickness uniformity of the projection liner below the PCM volume.
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公开(公告)号:US20220181546A1
公开(公告)日:2022-06-09
申请号:US17114594
申请日:2020-12-08
发明人: Injo Ok , RUQIANG BAO , Andrew Herbert Simon , Kevin W. Brew , Nicole Saulnier , Iqbal Rashid Saraf , Muthumanickam Sankarapandian , Sanjay C. Mehta
摘要: A semiconductor structure may include a heater surrounded by a dielectric layer, a projection liner on top of the heater, a phase change material layer above the projection liner, and a top electrode contact surrounding a top portion of the phase change material layer, The projection liner may cover a top surface of the heater. The projection liner may separate the phase change material layer from the second dielectric layer and the heater. The projection liner may provide a parallel conduction path in the crystalline phase and the amorphous phase of the phase change material layer. The top electrode contact may be separated from the phase change material layer by a metal liner. The semiconductor structure may include a bottom electrode below and in electrical contact with the heater and a top electrode above and in electrical contact with the phase change material layer.
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公开(公告)号:US20200150629A1
公开(公告)日:2020-05-14
申请号:US16186980
申请日:2018-11-12
发明人: Ravi K. Bonam , Nicole Saulnier , Michael Crouse , Derren N. Dunn
IPC分类号: G05B19/4155
摘要: Techniques for modifying a mask fabrication process based the identification of an abnormality in a pattern of a fabricated lithography mask are disclosed including comparing a fabricated lithography mask to a lithography mask design where the fabricated lithography mask is fabricated based at least in part on the lithography mask design using a mask fabrication process. An abnormality in a pattern of the fabricated lithography mask relative to a corresponding one of the plurality of patterns in the lithography mask design is identified based at least in part on the comparison of the fabricated lithography mask to the lithography mask design. A calibrated mask model is generated based at least in part on the identified abnormality in the pattern of the fabricated lithography mask and the mask fabrication process is modified based at least in part on the calibrated mask model.
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公开(公告)号:US20200066977A1
公开(公告)日:2020-02-27
申请号:US16107323
申请日:2018-08-21
发明人: Iqbal Rashid Saraf , Kevin W. Brew , Injo OK , Nicole Saulnier , Robert Bruce
IPC分类号: H01L45/00
摘要: Techniques regarding protecting a dielectric material during additive patterning of one or more phase change memories are provided. For example, one or more embodiments described herein can comprise a method, which can comprise forming a bi-layer adjacent a phase change memory element. The bi-layer can comprise a dielectric material and a capping material that can protect a thickness of the dielectric material during a patterning process.
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