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公开(公告)号：US20240037940A1
公开(公告)日：2024-02-01
申请号：US17875566
申请日：2022-07-28
发明人： Bo Wu , Chuang Gan , Pin-Yu Chen , Yang Zhang , Xin Zhang
IPC分类号： G06V20/40
摘要： A computer vision temporal action localization (TAL) computing tool and operations are provided. The TAL computing tool receives a coarse temporal bounding box, having a first start point and a first end point, for an action in the input video data, and a first set of logits, where each logit corresponds to a potential classification of the action in the input video data. The TAL computing tool executes a first engine on the coarse temporal bounding box to generate a second set of logits, and a second engine on the first set of logits to generate a refined temporal bounding box having a second start point and a second end point. The TAL computing tool performs the computer vision temporal action localization operation based on the second set of logits and the refined temporal bounding box to specify a temporal segment of the input video data corresponding to an action represented in the input video data, and a corresponding classification of the action represented in the temporal segment.
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公开(公告)号：US11799374B2
公开(公告)日：2023-10-24
申请号：US17476586
申请日：2021-09-16
发明人： Xin Zhang , Todd Edward Takken , Yuan Yao
CPC分类号： H02M3/003 , H05K1/181 , H05K3/303 , H05K2201/10325 , H05K2201/10719
摘要： A package structure is disclosed. The package structure includes processor die connected to a top surface of a package substrate. The package structure further includes a DC-DC power converter attached to a bottom surface of the package substrate. The DC-DC power converter is located at least within an open area of an interconnect component that connects the bottom surface of the package substrate and a top surface of a motherboard.
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公开(公告)号：US20230198177A1
公开(公告)日：2023-06-22
申请号：US17555346
申请日：2021-12-17
发明人： Xin Zhang , Todd Edward Takken , Yuan Yao , Andrew Ferencz
CPC分类号： H01R12/62 , H05K1/111 , H05K3/321 , H05K2201/10356 , H05K2201/10984
摘要： A semiconductor package provides a low profile connection to a bottom side of the semi-conductor package. The semi-conductor package includes a computer processor die and a substrate. The computer processor die is mounted on to a top surface of the substrate. The substrate is mounted on to a printed circuit board. A voltage regulator is coupled to the printed circuit board. A top surface of the voltage regulator is coupled to a bottom surface of the substrate. The package also includes a connector device. The connector device includes a cable configured to conduct power from an upstream source, and a low-profile connector module attached to an end of the cable. The connector module is configured to interface to a bottom surface of the voltage regulator.
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公开(公告)号：US20220139709A1
公开(公告)日：2022-05-05
申请号：US17089915
申请日：2020-11-05
发明人： Ko-Tao Lee , Shawn Xiaofeng Du , Ning Li , Xin Zhang
IPC分类号： H01L21/02 , H01L21/306 , H01L29/66 , H01L29/20 , H01L29/205 , H01L29/778 , C30B29/40 , C30B29/06 , C30B33/08 , C30B25/18 , C30B23/02
摘要： A method of manufacturing an electronic device is provided. The method includes forming a dielectric layer on a Si-based substrate, etching away portions of the dielectric layer to form a crisscrossing grid pattern of remaining portions of the dielectric layer and to expose the substrate in areas where the dielectric layer is removed, forming GaN-based layers on the substrate in growth areas between sidewalls of the remaining portions of the dielectric layer, and forming a semiconductor device on the GaN-based layers.
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公开(公告)号：US11311224B2
公开(公告)日：2022-04-26
申请号：US16738040
申请日：2020-01-09
发明人： Qianwen Chen , Huan Hu , Zheng Xu , Xin Zhang
摘要： A method is presented for forming a nanowire electrode. The method includes forming a plurality of nanowires over a first substrate, depositing a conducting layer over the plurality of nanowires, forming solder bumps and electrical interconnections over a second flexible substrate, and integrating nanowire electrode arrays to the second flexible substrate. The plurality of nanowires are silicon (Si) nanowires, the Si nanowires used as probes to penetrate skin of a subject to achieve electrical biopotential signals. The plurality of nanowires are formed over the first substrate by metal-assisted chemical etching.
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公开(公告)号：US11164335B2
公开(公告)日：2021-11-02
申请号：US16181744
申请日：2018-11-06
发明人： Xin Zhang , Peng Gao , Zhi Hu Wang , Ning Duan , Gang BJ Ning , Yan Fang
摘要： A computer-implemented method is presented for inferring passenger routes in a subway system. The method includes identifying, via an imaging device, a target passenger within the subway system, employing an exiting flow extractor to determine passenger exiting waves, employing an exiting wave identifier to mark an exiting wave of the passenger exiting waves including the target passenger, employing a supporting evidence backtracer to determine an entrance gate for each of the passengers in the marked exiting wave including the target passenger, determining a route probability for each of the passengers in the marked exiting wave including the target passenger via voting or distribution estimation processing, and employing a most probable route inferer to infer a route of the target passenger based on an aggregate route probability for all the passengers in the marked exiting wave.
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公开(公告)号：US11150712B2
公开(公告)日：2021-10-19
申请号：US16399981
申请日：2019-04-30
发明人： Xin Zhang , Todd E. Takken , Andrew Ferencz , Leland Chang , Paul W. Coteus
摘要： Voltage on the output terminal of an inductor is obtained as a first input signal to a control block (CB); the inductor has an input terminal connected to a power switch and driver block at a switching node. A sense input voltage is obtained on an output terminal of a sensing circuit that is not directly connected to the switching node, as a second input signal to the CB. A voltage is generated on a first output terminal of the CB and is selected such that the CB can use its first and second input signals to infer the current through the inductor. A pulse width modulation (PWM) signal is generated on a second output terminal of the CB, based on the inferred current through the inductor; the second output signal from the CB is provided to a PWM input terminal of the power switch and driver block.
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公开(公告)号：US11114944B2
公开(公告)日：2021-09-07
申请号：US16707186
申请日：2019-12-09
发明人： Xin Zhang , Todd E. Takken , Naigang Wang , Leland Chang
IPC分类号： H02M3/158
摘要： A multi-phase buck switching converter having grouped pairs of phases, each phase using two magnetically coupled air-core inductors. For each group, a first driver circuit controlling switching of a first power transistor switching circuit coupled to a first air-core inductor output for driving an output load at the first phase. A second driver circuit controlling switching of a second power transistor switching circuit coupled to a second air-core inductor output for driving said output load at the second phase. The first and second phases are spaced 180° apart. The coupled air-core inductors per group of such orientation, separation distance and mutual inductance polarity relative to each other such that magnetic coupling between the two or more inductors at each phase results in a net increase in effective inductance per unit volume. Each air-core inductor is a metal slab of defined length, height and thickness formed using back-end-of-line semiconductor manufacturing process.
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公开(公告)号：US20210117453A1
公开(公告)日：2021-04-22
申请号：US17133935
申请日：2020-12-24
发明人： Ning Duan , Yu Huang , Zhi Hu Wang , Yan Shiping , Xin Zhang , Jun Zhu
IPC分类号： G06F16/29 , G06F16/901
摘要： Techniques facilitating resolution-based spatial computing are provided. In one example, a computer-implemented method comprises traversing, by a device operatively coupled to a processor, a data structure corresponding to a land area for a location having an index; and determining, by the device, whether the location is at least partially within the land area based on a result of the traversing. In some embodiments, the traversing comprises: obtaining a threshold number of levels based at least in part on a resolution parameter; scanning a first level of the data structure for a node having an index corresponding to the index of the location; and iterating the scanning for respective subsequent levels of the data structure based on the scanning returning a node having subordinate nodes and a number of levels for which the scanning and iterating have been performed being less than the threshold number of levels.
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公开(公告)号：US20210111192A1
公开(公告)日：2021-04-15
申请号：US16600604
申请日：2019-10-14
发明人： Ko-Tao Lee , Xin Zhang , Todd Edward Takken
IPC分类号： H01L27/12 , H01L21/84 , H01L21/762
摘要： The semiconductor structure includes a semiconductor-on-insulator (SOI) substrate. A group III nitride transistor is formed in a trench in the SOI substrate. The activation of the group III nitride transistor is controlled by a silicon-based transistor. The silicon-based transistor that includes a portion of a silicon layer of the SOI substrate. A group III nitride transistor device is adjacent to the silicon-based transistor.
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