公开(公告)号：US06293789B1

公开(公告)日：2001-09-25

申请号：US09550400

申请日：2000-04-14

Applicant: J. Brett Rolfson ,  Rodney C. Langley

Inventor： J. Brett Rolfson ,  Rodney C. Langley

IPC: F27D500

CPC classification number: H01L21/68742 ,  H01L21/67109 ,  H01L21/68757

Abstract: An apparatus for semiconductor processing includes: a) at least one support member comprising an upper surface for supporting a semiconductor wafer; b) a component through which the support member extends, the component comprising a front surface and a back surface, at least one of the support member and the component being movable relative to the other of the support member and the component such that the support member can support a wafer in an elevated position above the front surface and can be withdrawn into the component to lower the wafer relative to the front surface of the component; and c) a block joined to the support member below the component back surface, the block engaging the component back surface when the support member upper surface extends above the component to a predetermined distance, the block preventing the support member upper surface from extending beyond the front surface by more than the predetermined distance.

Abstract translation: 一种用于半导体处理的设备包括：a）至少一个支撑构件，其包括用于支撑半导体晶片的上表面; b）支撑构件延伸的构件，该构件包括前表面和后表面，支撑构件和构件中的至少一个可相对于支撑构件和构件中的另一个移动，使得支撑构件 可以在前表面上方的升高位置支撑晶片，并且可以将晶片取出到组件中以相对于部件的前表面降低晶片; 以及c）在所述部件后表面下方连接到所述支撑构件的块，当所述支撑构件上表面在所述构件上方延伸到预定距离时，所述块与所述构件背面接合，所述块防止所述支撑构件上表面延伸超过 前表面超过预定距离。

公开(公告)号：US06248671B1

公开(公告)日：2001-06-19

申请号：US09136883

申请日：1998-08-19

Applicant: J. Brett Rolfson ,  Rodney C. Langley

Inventor： J. Brett Rolfson ,  Rodney C. Langley

IPC: H01L21469

CPC classification number: H01L21/68742 ,  H01L21/67109 ,  H01L21/68757

Abstract: In one aspect, the invention encompasses an apparatus for semiconductor processing comprising: a) at least one support member comprising an upper surface for supporting a semiconductor wafer; b) a component through which the support member extends, the component comprising a front surface and a back surface, at least one of the support member and the component being movable relative to the other of the support member and the component such that the support member can support a wafer in an elevated position above the front surface and can be withdrawn into the component to lower the wafer relative to the front surface of the component; and c) a block joined to the support member below the component back surface, the block engaging the component back surface when the support member upper surface extends above the component to a predetermined distance, the block preventing the support member upper surface from extending beyond the front surface by more than the predetermined distance. In other aspects, the invention encompasses semiconductor processing methods, such as, for example, methods utilizing the above-described apparatus.

Abstract translation: 一方面，本发明包括用于半导体处理的装置，包括：a）至少一个支撑构件，其包括用于支撑半导体晶片的上表面; b）支撑构件延伸的构件，该构件包括前表面和后表面，支撑构件和构件中的至少一个可相对于支撑构件和构件中的另一个移动，使得支撑构件 可以在前表面上方的升高位置支撑晶片，并且可以将晶片取出到组件中以相对于部件的前表面降低晶片; 以及c）在所述部件后表面下方连接到所述支撑构件的块，当所述支撑构件上表面在所述构件上方延伸到预定距离时，所述块与所述构件背面接合，所述块防止所述支撑构件上表面延伸超过 前表面超过预定距离。 在其它方面，本发明包括半导体处理方法，例如利用上述装置的方法。

公开(公告)号：US06380100B2

公开(公告)日：2002-04-30

申请号：US09859203

申请日：2001-05-15

Applicant: J. Brett Rolfson ,  Rodney C. Langley

Inventor： J. Brett Rolfson ,  Rodney C. Langley

IPC: H01L2131

CPC classification number: H01L21/68742 ,  H01L21/67109 ,  H01L21/68757

Abstract: In one aspect, the invention encompasses an apparatus for semiconductor processing comprising: a) at least one support member comprising an upper surface for supporting a semiconductor wafer; b) a component through which the support member extends, the component comprising a front surface and a back surface, at least one of the support member and the component being movable relative to the other of the support member and the component such that the support member can support a wafer in an elevated position above the front surface and can be withdrawn into the component to lower the wafer relative to the front surface of the component; and c) a block joined to the support member below the component back surface, the block engaging the component back surface when the support member upper surface extends above the component to a predetermined distance, the block preventing the support member upper surface from extending beyond the front surface by more than the predetermined distance. In other aspects, the invention encompasses semiconductor processing methods, such as, for example, methods utilizing the above-described apparatus.

Abstract translation: 一方面，本发明包括用于半导体处理的装置，包括：a）至少一个支撑构件，其包括用于支撑半导体晶片的上表面; b）支撑构件延伸的构件，该构件包括前表面和后表面，支撑构件和构件中的至少一个可相对于支撑构件和构件中的另一个移动，使得支撑构件 可以在前表面上方的升高位置支撑晶片，并且可以将晶片取出到组件中以相对于部件的前表面降低晶片; 以及c）在所述部件后表面下方连接到所述支撑构件的块，当所述支撑构件上表面在所述构件上方延伸到预定距离时，所述块与所述构件背面接合，所述块防止所述支撑构件上表面延伸超过 前表面超过预定距离。 在其它方面，本发明包括半导体处理方法，例如利用上述装置的方法。

公开(公告)号：US07838183B2

公开(公告)日：2010-11-23

申请号：US12581455

申请日：2009-10-19

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F1/00

CPC classification number: G03F1/32 ,  G03F1/29

Abstract: The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.

Abstract translation: 本发明提供了衰减相移掩模（“APSM”），其在每个实施例中包括尺寸和形状以确定期望的半导体器件特征的完全透射区域，在完全透射区域的边缘处对应于隔离的器件特征的略微衰减的区域 在完全透射区域的边缘处的高度衰减的区域对应于紧密间隔或嵌套的器件特征，以及完全不透明的区域，其中期望阻止通过APSM的所有辐射的透射。 本发明还提供了制造根据本发明的APSM的方法。

公开(公告)号：US07535112B2

公开(公告)日：2009-05-19

申请号：US11584163

申请日：2006-10-20

Applicant: John Aiton ,  Joseph M. Richards ,  J. Brett Rolfson ,  John M. Drynan

Inventor： John Aiton ,  Joseph M. Richards ,  J. Brett Rolfson ,  John M. Drynan

IPC: H01L23/29

CPC classification number: H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/49431 ,  H01L2224/78301 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00

Abstract: The invention includes a semiconductor construction having a wire bonding region associated with a metal-containing layer, and having radiation-imageable material over the metal-containing layer. The radiation-imageable material can be configured as a multi-level pattern having a first topographical region with a first elevational height and a second topographical region with a second elevational height above the first elevational height. The second topographical region can be laterally displaced from the bonding region by at least a lateral width of the first topographical region, with said lateral width being at least about 10 microns. Additionally, or alternatively, the elevational height of the second topographical region can be at least about 2 microns above the elevational height of the first topographical region. The invention also includes a method of forming wire bonds for semiconductor constructions in which a multi-level pattern is photolithographically formed in a radiation-imageable material (such as, for example, polyimide).

Abstract translation: 本发明包括一种半导体结构，其具有与含金属层相关联的引线接合区域，并且在含金属层之上具有可辐射成像材料。 可辐射成像材料可以被配置为具有具有第一高度的第一形貌区域和具有高于第一高度高度的第二高度高度的第二地形区域的多层图案。 第二形貌区域可以从接合区域横向移位至少第一形貌区域的横向宽度，所述横向宽度为至少约10微米。 另外或替代地，第二形貌区域的高度高度可以高于第一地形区域的高度高度至少约2微米。 本发明还包括一种形成用于半导体结构的引线键合的方法，其中在可辐射成像材料（例如，聚酰亚胺）中光刻形成多层图案。

公开(公告)号：US07494750B2

公开(公告)日：2009-02-24

申请号：US11478887

申请日：2006-06-30

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F1/00

CPC classification number: G03F1/32 ,  G03F1/50 ,  G03F7/70425

Abstract: The invention includes reticles and methods of forming reticles. In one aspect, a reticle can include a quartz-containing substrate, an attenuating layer, and an antireflective structure between the attenuating layer and the quartz-containing substrate. The invention can also include a reticle having a relatively transparent region between first and second surfaces, a relatively opaque region proximate the first surface, and a layer comprising one or both of metal fluoride and hafnium oxide proximate the first or second surface. The invention can also include methods of forming reticles in which an antireflective structure is formed over a surface of a quartz-containing substrate. The antireflective structure can comprise a Fabry-Perot pair, and in some aspects can comprise a layer containing one or both of metal fluoride and hafnium oxide.

Abstract translation: 本发明包括掩模版和形成掩模版的方法。 在一个方面，掩模版可以包括含有石英的衬底，衰减层和在所述衰减层和含石英衬底之间的抗反射结构。 本发明还可以包括在第一表面和第二表面之间具有相对透明区域的掩模版，靠近第一表面的相对不透明的区域，以及在第一表面或第二表面附近包含金属氟化物和氧化铪中的一种或两种的层。 本发明还可以包括在含石英衬底的表面上形成抗反射结构的形成掩模版的方法。 抗反射结构可以包含法布里 - 珀罗对，并且在一些方面可以包含含有金属氟化物和氧化铪中的一种或两种的层。

公开(公告)号：US07455937B2

公开(公告)日：2008-11-25

申请号：US11003274

申请日：2004-12-03

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F1/00

CPC classification number: G03F1/32 ,  G03F1/50 ,  G03F7/70425

Abstract: The invention includes reticles and methods of forming reticles. In one aspect, a reticle can include a quartz-containing substrate, an attenuating layer, and an antireflective structure between the attenuating layer and the quartz-containing substrate. The invention can also include a reticle having a relatively transparent region between first and second surfaces, a relatively opaque region proximate the first surface, and a layer comprising one or both of metal fluoride and hafnium oxide proximate the first or second surface. The invention can also include methods of forming reticles in which an antireflective structure is formed over a surface of a quartz-containing substrate. The antireflective structure can comprise a Fabry-Perot pair, and in some aspects can comprise a layer containing one or both of metal fluoride and hafnium oxide.

Abstract translation: 本发明包括掩模版和形成掩模版的方法。 在一个方面，掩模版可以包括含有石英的衬底，衰减层和在所述衰减层和含石英衬底之间的抗反射结构。 本发明还可以包括在第一表面和第二表面之间具有相对透明区域的掩模版，靠近第一表面的相对不透明的区域，以及在第一表面或第二表面附近包含金属氟化物和氧化铪中的一种或两种的层。 本发明还可以包括在含石英衬底的表面上形成抗反射结构的形成掩模版的方法。 抗反射结构可以包含法布里 - 珀罗对，并且在一些方面可以包含含有金属氟化物和氧化铪中的一种或两种的层。

公开(公告)号：US06767690B2

公开(公告)日：2004-07-27

申请号：US10391310

申请日：2003-03-17

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F700

CPC classification number: G03F7/70466 ,  G03F7/0045 ,  Y10S430/143

Abstract: The invention encompasses a method for forming a pattern across and expanse of photoresist. The expanse comprises a defined first region, second region and third region. The first region is exposed to a first radiation while leaving the third region not exposed; and subsequently the second region is exposed to a second radiation while leaving the third region not exposed to the second radiation. The second radiation is different from the first radiation. The exposure of the first and second regions in a solvent relative to the solubility of the third region of the expanse. After the first and second regions of the expanse are exposed to the first and second radiations, the expanse is exposed to a solvent to pattern the expanse. The invention can be utilized in forming radiation-patterning tools and stencils; and in patterning semiconductor substrates.

Abstract translation: 本发明包括一种用于在一片光致抗蚀剂上形成图案的方法。 该扩展包括限定的第一区域，第二区域和第三区域。 第一区域暴露于第一辐射同时使第三区域不暴露; 并且随后第二区域暴露于第二辐射，同时使第三区域不暴露于第二辐射。 第二次辐射与第一次辐射不同。 第一和第二区域暴露于第一和第二辐射改变第一和第二区域在溶剂中相对于the第三区域的溶解度的溶解度。 在广the的第一和第二区域暴露于第一次和第二次辐射之后，将该exp is暴露于溶剂以对exp to进行模拟。 本发明可用于形成辐射图案化工具和模板; 并且在图案化半导体衬底中。

公开(公告)号：US06599666B2

公开(公告)日：2003-07-29

申请号：US09809720

申请日：2001-03-15

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F900

CPC classification number: G03F1/32 ,  G03F1/29

Abstract: The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely-spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.

公开(公告)号：US06555298B1

公开(公告)日：2003-04-29

申请号：US09643466

申请日：2000-08-22

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: G03F726

CPC classification number: H01L21/67103 ,  F28D2021/0077 ,  G03F7/168 ,  G03F7/38 ,  G03F7/40 ,  H01L21/67109

Abstract: A method and apparatus for baking a film onto a substrate. A film, such as a layer of photoresist, is disposed on a first surface of a substrate while a second surface is exposed to a liquid bath. The liquid bath is maintained at a pre-selected temperature. Exposure of the substrate to the liquid bath allows the film on the opposite surface to bake. The liquid bath is then re-circulated to maintain a constant and uniform temperature gradient across the substrate.

Abstract translation: 一种将薄膜烘烤在基材上的方法和装置。 将诸如光致抗蚀剂层的膜设置在基板的第一表面上，同时将第二表面暴露于液槽。 液浴保持在预先选定的温度。 将基板暴露于液槽允许相对表面上的膜被烘烤。 然后液体浴再次循环，以保持基板上恒定均匀的温度梯度。