公开(公告)号：US09958719B2

公开(公告)日：2018-05-01

申请号：US15397401

申请日：2017-01-03

Applicant: Japan Display Inc.

Inventor： Yuki Matsuura ,  Osamu Itou

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  G02F1/1339

CPC classification number: G02F1/133345 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2203/055 ,  H01L27/1218 ,  H01L27/1248

Abstract: According to one embodiment, a display device includes an insulating substrate, a first insulating film, a second insulating film, a third insulating film, a fourth insulating film, a fifth insulating film, a sixth insulating film, a color filter layer, a semiconductor layer disposed between the second insulating film and the third insulating film, and a gate electrode disposed between the third insulating film and the fourth insulating film, wherein the first, fourth, and sixth insulating films are formed of a silicon nitride, and the second, third, and fifth insulating films are formed of a silicon oxide.

公开(公告)号：US09129864B2

公开(公告)日：2015-09-08

申请号：US14168366

申请日：2014-01-30

Applicant: Japan Display Inc.

Inventor： Yuki Matsuura

IPC: H01L29/78 ,  H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1255

Abstract: According to one embodiment, a semiconductor device includes, an oxide semiconductor layer including a channel region, and a source region and a drain region, a first insulation film covering the channel region and exposing the source region and the drain region, a first conductive layer including a gate electrode, and a first terminal electrode, a second insulation film covering the first conductive layer, the source region and the drain region, a second conductive layer including a source electrode, a drain electrode, and a second terminal electrode which is opposed to the first terminal electrode via the second insulation film, and a third insulation film interposed between the second insulation film, and the source electrode and the drain electrode.

Abstract translation: 根据一个实施例，半导体器件包括：包括沟道区的氧化物半导体层，源区和漏区，覆盖沟道区并暴露源区和漏区的第一绝缘膜，第一导电层 包括栅极电极和第一端子电极，覆盖第一导电层，源极区域和漏极区域的第二绝缘膜，包括源极电极，漏极电极和与其相对的第二端子电极的第二导电层 经由第二绝缘膜与第一端子电极连接，第三绝缘膜插入在第二绝缘膜与源电极和漏电极之间。

公开(公告)号：US20140191231A1

公开(公告)日：2014-07-10

申请号：US14206858

申请日：2014-03-12

Applicant: JAPAN DISPLAY INC.

Inventor： Tetsuya SHIBATA ,  Hajime Watakabe ,  Atsushi Sasaki ,  Yuki Matsuura ,  Muneharu Akiyoshi ,  Hiroyuki Watanabe

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

Abstract translation: 根据一个实施例，制造薄膜晶体管电路衬底的方法包括在绝缘衬底上形成氧化物半导体薄膜，形成栅极绝缘膜和栅电极，所述栅极绝缘膜和栅电极层叠在氧化物半导体薄膜的第一区域上 ，并且从所述栅极绝缘膜暴露所述氧化物半导体薄膜的第二区域和第三区域，所述第二区域和所述第三区域位于所述氧化物半导体薄膜的所述第一区域的两侧，形成层间绝缘膜 包括硅的悬挂键，覆盖第二区域的层间绝缘膜和氧化物半导体薄膜的第三区域，栅极绝缘膜和栅电极，以及形成源电极和漏电极。

公开(公告)号：US09123588B2

公开(公告)日：2015-09-01

申请号：US14206858

申请日：2014-03-12

Applicant: JAPAN DISPLAY INC.

Inventor： Tetsuya Shibata ,  Hajime Watakabe ,  Atsushi Sasaki ,  Yuki Matsuura ,  Muneharu Akiyoshi ,  Hiroyuki Watanabe

IPC: H01L29/72 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

Abstract translation: 根据一个实施例，制造薄膜晶体管电路衬底的方法包括在绝缘衬底上形成氧化物半导体薄膜，形成栅极绝缘膜和栅电极，所述栅极绝缘膜和栅电极层叠在氧化物半导体薄膜的第一区域上 并且从所述栅极绝缘膜暴露所述氧化物半导体薄膜的第二区域和第三区域，所述第二区域和所述第三区域位于所述氧化物半导体薄膜的所述第一区域的两侧，形成层间绝缘膜 包括硅的悬挂键，覆盖第二区域的层间绝缘膜和氧化物半导体薄膜的第三区域，栅极绝缘膜和栅电极，以及形成源电极和漏电极。

公开(公告)号：US20170205660A1

公开(公告)日：2017-07-20

申请号：US15397401

申请日：2017-01-03

Applicant: Japan Display Inc.

Inventor： Yuki Matsuura ,  Osamu Itou

IPC: G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1343

CPC classification number: G02F1/133345 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2203/055 ,  H01L27/1218 ,  H01L27/1248

Abstract: According to one embodiment, a display device includes an insulating substrate, a first insulating film, a second insulating film, a third insulating film, a fourth insulating film, a fifth insulating film, a sixth insulating film, a color filter layer, a semiconductor layer disposed between the second insulating film and the third insulating film, and a gate electrode disposed between the third insulating film and the fourth insulating film, wherein the first, fourth, and sixth insulating films are formed of a silicon nitride, and the second, third, and fifth insulating films are formed of a silicon oxide.

公开(公告)号：US09523890B2

公开(公告)日：2016-12-20

申请号：US14326804

申请日：2014-07-09

Applicant: Japan Display Inc.

Inventor： Yuki Matsuura ,  Muneharu Akiyoshi

IPC: G02F1/1339 ,  G02F1/1333 ,  G02F1/1341

CPC classification number: G02F1/1339 ,  G02F1/13394 ,  G02F2001/133388 ,  G02F2001/13415

Abstract: According to one embodiment, a liquid crystal panel includes substrates opposed to each other and paired. The liquid crystal panel includes a liquid crystal layer interposed between the substrates. The liquid crystal panel includes a sealed portion that includes bending corner portions at positions spaced from the outer edges of the substrates, and surrounds the periphery of the liquid crystal layer and bonds the substrates together. The liquid crystal panel includes main spacers that are interposed between the substrates at the position of the liquid crystal layer and hold the gap between the substrates. The liquid crystal panel includes auxiliary spacers that are interposed between the substrates to fill the portions between the outer side portions of the corner portions of the sealed portion and the outer edge sides of the substrates and hold the gap between the substrates.

Abstract translation: 根据一个实施例，液晶面板包括彼此相对并配对的基板。 液晶面板包括插入在基板之间的液晶层。 液晶面板包括密封部分，其包括在与基板的外边缘间隔开的位置处的弯曲角部分，并且包围液晶层的周边并将基板粘合在一起。 液晶面板包括在液晶层的位置处插入在基板之间并保持基板之间的间隙的主间隔件。 液晶面板包括介于基板之间的辅助间隔物，以填充密封部分的角部的外侧部分与基板的外边缘侧之间的部分，并保持基板之间的间隙。