公开(公告)号：US07510904B2

公开(公告)日：2009-03-31

申请号：US11556739

申请日：2006-11-06

申请人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

发明人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

IPC分类号： H01L21/00

CPC分类号： H01L31/101

摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

摘要翻译： 本发明解决了与Si CMOS技术兼容的高速高效光电探测器的问题。 该结构由薄的SOI衬底上的Ge吸收层组成，并且使用隔离区，交替的n型和p型接触以及低电阻表面电极。 该器件通过利用掩埋绝缘层，通过利用Ge吸收层，利用薄的吸收层和窄电极间隔的低电压操作以及兼容性来兼容宽泛的光谱，利用埋入的绝缘层来隔离底层衬底中产生的载流子， 通过其平面结构和使用IV族吸收材料的CMOS器件。 用于制造光电检测器的方法使用在薄SOI或外延氧化物上的Ge的直接生长，以及随后的热退火以实现高质量的吸收层。 该方法限制可用于相互扩散的Si的量，从而允许Ge层退火，而不会导致Ge层被下面的Si大量稀释。

公开(公告)号：US07915653B2

公开(公告)日：2011-03-29

申请号：US11556755

申请日：2006-11-06

申请人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

发明人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

IPC分类号： H01L27/146

CPC分类号： H01L31/101

摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

摘要翻译： 本发明解决了与Si CMOS技术兼容的高速高效光电探测器的问题。 该结构由薄的SOI衬底上的Ge吸收层组成，并且使用隔离区，交替的n型和p型接触以及低电阻表面电极。 该器件通过利用掩埋绝缘层，通过利用Ge吸收层，利用薄吸收层和窄电极间隔的低电压操作以及兼容性来兼容通过利用掩埋绝缘层来隔离在下面的衬底中产生的载流子，在广谱上的高量子效率， 通过其平面结构和使用IV族吸收材料的CMOS器件。 用于制造光电检测器的方法使用在薄SOI或外延氧化物上的Ge的直接生长，以及随后的热退火以实现高质量的吸收层。 该方法限制可用于相互扩散的Si的量，从而允许Ge层退火，而不会导致Ge层被下面的Si大量稀释。

公开(公告)号：US20080185618A1

公开(公告)日：2008-08-07

申请号：US11556755

申请日：2006-11-06

申请人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

发明人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

IPC分类号： H01L27/146

CPC分类号： H01L31/101

摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

摘要翻译： 本发明解决了与Si CMOS技术兼容的高速高效光电探测器的问题。 该结构由薄的SOI衬底上的Ge吸收层组成，并且使用隔离区，交替的n型和p型接触以及低电阻表面电极。 该器件通过利用掩埋绝缘层来隔离衬底中产生的载流子，通过利用Ge吸收层，在广谱上产生高量子效率，利用薄吸收层和窄电极间隔的低电压操作以及兼容性来实现高带宽 通过其平面结构和使用IV族吸收材料的CMOS器件。 用于制造光电检测器的方法使用在薄SOI或外延氧化物上的Ge的直接生长，以及随后的热退火以实现高质量的吸收层。 该方法限制可用于相互扩散的Si的量，从而允许Ge层退火，而不会导致Ge层被下面的Si大量稀释。

公开(公告)号：US20080113467A1

公开(公告)日：2008-05-15

申请号：US11556739

申请日：2006-11-06

申请人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

发明人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiqing Ouyang ,  Jeremy D. Schaub

IPC分类号： H01L21/00

CPC分类号： H01L31/101

摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

公开(公告)号：US07138697B2

公开(公告)日：2006-11-21

申请号：US10785894

申请日：2004-02-24

申请人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiging Ouyang ,  Jeremy D. Schaub

发明人： Jack O. Chu ,  Gabriel K. Dehlinger ,  Alfred Grill ,  Steven J. Koester ,  Qiging Ouyang ,  Jeremy D. Schaub

IPC分类号： H01L31/105

CPC分类号： H01L31/101

摘要： The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

公开(公告)号：US08927057B2

公开(公告)日：2015-01-06

申请号：US12710333

申请日：2010-02-22

申请人： Ageeth A. Bol ,  Roy A. Carruthers ,  Jack O. Chu ,  Alfred Grill ,  Christian Lavoie ,  Katherine L. Saenger ,  James C. Tsang

发明人： Ageeth A. Bol ,  Roy A. Carruthers ,  Jack O. Chu ,  Alfred Grill ,  Christian Lavoie ,  Katherine L. Saenger ,  James C. Tsang

IPC分类号： B05D7/00 ,  C01B31/04 ,  B82Y30/00 ,  B82Y40/00

CPC分类号： C01B31/0446 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/184 ,  Y10T428/30

摘要： A method for forming a single, few-layer, or multi-layer graphene and structure is described incorporating selecting a substrate having a buried layer of carbon underneath a metal layer, providing an ambient and providing a heat treatment to pass carbon through the metal layer to form a graphene layer on the metal layer surface or incorporating a metal-carbon layer which is heated to segregate carbon in the form of graphene to the surface or chemically reacting the metal in the metal-carbon layer with a substrate containing Si driving the carbon to the surface whereby graphene is formed.

摘要翻译： 描述了形成单层，几层或多层石墨烯和结构的方法，其包括选择在金属层下方具有埋藏层的衬底的基底，提供环境并提供热处理以使碳通过金属层 以在金属层表面上形成石墨烯层或掺入金属碳层，该金属碳层被加热以将石墨烯形式的碳分离到表面或使金属 - 碳层中的金属与含有驱动碳的Si的基板化学反应 到形成石墨烯的表面。

公开(公告)号：US07811906B1

公开(公告)日：2010-10-12

申请号：US12612331

申请日：2009-11-04

申请人： Ageeth A. Bol ,  Jack O. Chu ,  Alfred Grill ,  Conal E. Murray ,  Katherine L. Saenger

发明人： Ageeth A. Bol ,  Jack O. Chu ,  Alfred Grill ,  Conal E. Murray ,  Katherine L. Saenger

IPC分类号： H01L21/36 ,  H01L21/20 ,  H01L21/44 ,  H01L21/31

CPC分类号： H01L21/32139 ,  H01L21/762

摘要： An in-place bonding method in which a metal template layer under a carbon layer is removed while the carbon layer is still attached to a substrate is described for forming a carbon-on-insulator substrate. In one embodiment of the in-place bonding method, at least one layered metal/carbon (M/C) region is formed on an insulating surface layer of an initial substrate structure. The at least one layered M/C region has edges that are bordered by exposed regions of the insulating surface layer. Some edges of the at least one layered M/C region are then secured to a base substrate of the initial structure via a securing structure, while other edges are left exposed. A selective metal etchant removes the metal layer under the carbon layer using the exposed edges for access. After metal etching, the now-unsupported carbon layer bonds to the underlying insulating surface layer by attraction.

摘要翻译： 为了形成绝缘体上的基板，描述了其中在碳层仍然附着到基板上时除去碳层下面的金属模板层的就地结合方法。 在就地接合方法的一个实施例中，在初始衬底结构的绝缘表面层上形成至少一个层状金属/碳（M / C）区域。 所述至少一层分层的M / C区域具有与绝缘表面层的暴露区域相邻的边缘。 然后，至少一层分层M / C区域的一些边缘经由固定结构固定到初始结构的基底，同时其它边缘被暴露。 选择性金属蚀刻剂使用暴露的边缘去除碳层下方的金属层以进入。 在金属蚀刻之后，现在无载体的碳层通过吸引而结合到下面的绝缘表面层。

公开(公告)号：US06593625B2

公开(公告)日：2003-07-15

申请号：US10115160

申请日：2002-04-03

申请人： Silke H. Christiansen ,  Jack O. Chu ,  Alfred Grill ,  Patricia M. Mooney

发明人： Silke H. Christiansen ,  Jack O. Chu ,  Alfred Grill ,  Patricia M. Mooney

IPC分类号： H01L310392

CPC分类号： H01L21/7624 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/76251 ,  Y10S438/938

摘要： A method to obtain thin (

公开(公告)号：US08877340B2

公开(公告)日：2014-11-04

申请号：US12844029

申请日：2010-07-27

申请人： Jack O. Chu ,  Christos Dimitrakopoulos ,  Marcus O. Freitag ,  Alfred Grill ,  Timothy J. McArdle ,  Chun-Yung Sung ,  Robert L. Wisnieff

发明人： Jack O. Chu ,  Christos Dimitrakopoulos ,  Marcus O. Freitag ,  Alfred Grill ,  Timothy J. McArdle ,  Chun-Yung Sung ,  Robert L. Wisnieff

IPC分类号： B32B9/00

CPC分类号： H01L21/02527 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/188 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02516 ,  Y10T428/30

摘要： A graphene layer is formed on a crystallographic surface having a non-hexagonal symmetry. The crystallographic surface can be a surface of a single crystalline semiconductor carbide layer. The non-hexagonal symmetry surface of the single crystalline semiconductor carbide layer is annealed at an elevated temperature in ultra-high vacuum environment to form the graphene layer. During the anneal, the semiconductor atoms on the non-hexagonal surface of the single crystalline semiconductor carbide layer are evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed, the carbon concentration on the surface of the semiconductor-carbon alloy layer increases. Despite the non-hexagonal symmetry of the surface of the semiconductor-carbon alloy layer, the remaining carbon atoms can coalesce to form a graphene layer having hexagonal symmetry.

摘要翻译： 在具有非六边形对称性的结晶表面上形成石墨烯层。 晶体表面可以是单晶半导体碳化物层的表面。 单晶半导体碳化物层的非六边形对称表面在超高真空环境中在升高的温度下退火以形成石墨烯层。 在退火过程中，单晶半导体碳化物层的非六边形表面上的半导体原子对碳原子有选择性的蒸发。 随着半导体原子被选择性地去除，半导体 - 碳合金层表面上的碳浓度增加。 尽管半导体 - 碳合金层的表面具有非六边形对称性，但剩余的碳原子可以聚结形成具有六边形对称性的石墨烯层。

公开(公告)号：US08187955B2

公开(公告)日：2012-05-29

申请号：US12546034

申请日：2009-08-24

申请人： Jack O. Chu ,  Christos D. Dimitrakopoulos ,  Alfred Grill ,  Chun-yung Sung

发明人： Jack O. Chu ,  Christos D. Dimitrakopoulos ,  Alfred Grill ,  Chun-yung Sung

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L29/1606 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/184 ,  C01B2204/04 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/02667 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/161 ,  Y10T428/265

摘要： A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer during a high temperature anneal, during which the semiconductor material on the surface of the semiconductor-carbon alloy layer is evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed and the carbon concentration on the surface of the semiconductor-carbon alloy layer increases, the remaining carbon atoms in the top layers of the semiconductor-carbon alloy layer coalesce to form a graphene layer having at least one graphene monolayer. Thus, a graphene layer may be provided on a commercially available semiconductor substrate having a diameter of 200 mm or 300 mm.

摘要翻译： 半导体 - 碳合金层形成在半导体衬底的表面上，半导体衬底的表面可以是诸如硅衬底的市售半导体衬底。 半导体 - 碳合金层在高温退火期间被转化为至少一个石墨烯层，在此期间半导体 - 碳合金层表面上的半导体材料对碳原子有选择性的蒸发。 随着半导体原子被选择性地去除并且半导体 - 碳合金层的表面上的碳浓度增加，半导体 - 碳合金层顶层中剩余的碳原子聚结形成具有至少一个石墨烯单层的石墨烯层 。 因此，可以在直径为200mm或300mm的市售半导体衬底上提供石墨烯层。