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    Semiconductor Memory Devices and Methods of Fabricating the Same
    1.
    发明申请
    Semiconductor Memory Devices and Methods of Fabricating the Same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20140151777A1

    公开(公告)日：2014-06-05

    申请号：US14096195

    申请日：2013-12-04

    申请人： Jae-Hwang Sim ,  Jinhyun Shin ,  Jong-Min Lee

    发明人： Jae-Hwang Sim ,  Jinhyun Shin ,  Jong-Min Lee

    IPC分类号： H01L29/788

    CPC分类号： H01L27/11524 ,  H01L21/764 ,  H01L29/42324

    摘要： Provided are a semiconductor memory device and a method of fabricating the same, the semiconductor memory device may include a semiconductor substrate with a first trench defining active regions in a first region and a second trench provided in a second region around the first region, a gate electrode provided on the first region to cross the active regions, a charge storing pattern disposed between the gate electrode and the active regions, a blocking insulating layer provided between the gate electrode and the charge storing pattern and extending over the first trench to define a first air gap in the first trench, and an insulating pattern provided spaced apart from a bottom surface of the second trench to define a second air gap in the second trench.

    摘要翻译： 提供一种半导体存储器件及其制造方法，半导体存储器件可以包括半导体衬底，该半导体衬底具有限定第一区域中的有源区域的第一沟槽和设置在第一区域周围的第二区域中的第二沟槽，栅极 电极，设置在第一区域上以与有源区交叉，设置在栅电极和有源区之间的电荷存储图案，设置在栅电极和电荷存储图案之间并在第一沟槽上延伸以限定第一 第一沟槽中的空气间隙，以及设置成与第二沟槽的底表面间隔开的绝缘图案，以在第二沟槽中限定第二气隙。

    Semiconductor memory devices including an air gap and methods of fabricating the same
    2.
    发明授权
    Semiconductor memory devices including an air gap and methods of fabricating the same 有权
    包括气隙的半导体存储器件及其制造方法

    公开(公告)号：US09166012B2

    公开(公告)日：2015-10-20

    申请号：US14096195

    申请日：2013-12-04

    申请人： Jae-Hwang Sim ,  Jinhyun Shin ,  Jong-Min Lee

    发明人： Jae-Hwang Sim ,  Jinhyun Shin ,  Jong-Min Lee

    IPC分类号： H01L29/788 ,  H01L29/423 ,  H01L21/764 ,  H01L27/115

    CPC分类号： H01L27/11524 ,  H01L21/764 ,  H01L29/42324

    摘要： Provided are a semiconductor memory device and a method of fabricating the same, the semiconductor memory device may include a semiconductor substrate with a first trench defining active regions in a first region and a second trench provided in a second region around the first region, a gate electrode provided on the first region to cross the active regions, a charge storing pattern disposed between the gate electrode and the active regions, a blocking insulating layer provided between the gate electrode and the charge storing pattern and extending over the first trench to define a first air gap in the first trench, and an insulating pattern provided spaced apart from a bottom surface of the second trench to define a second air gap in the second trench.

    摘要翻译： 提供一种半导体存储器件及其制造方法，半导体存储器件可以包括半导体衬底，该半导体衬底具有限定第一区域中的有源区域的第一沟槽和设置在第一区域周围的第二区域中的第二沟槽，栅极 电极，设置在第一区域上以与有源区交叉，设置在栅电极和有源区之间的电荷存储图案，设置在栅电极和电荷存储图案之间并在第一沟槽上延伸以限定第一 第一沟槽中的空气间隙，以及设置成与第二沟槽的底表面间隔开的绝缘图案，以在第二沟槽中限定第二气隙。

    SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20090305495A1

    公开(公告)日：2009-12-10

    申请号：US12465013

    申请日：2009-05-13

    申请人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    发明人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76816 ,  H01L21/31144

    摘要： A semiconductor device may include plugs disposed in a zigzag pattern, interconnections electrically connected to the plugs and a protection pattern which is interposed between the plugs and the interconnections to selectively expose the plugs. The interconnections may include a connection portion which is in contact with plugs selectively exposed by the protection pattern. A method of manufacturing a semiconductor device includes, after forming a molding pattern and a mask pattern, selectively etching a protection layer using the mask pattern to form a protection pattern exposing a plug.

    摘要翻译： 半导体器件可以包括以锯齿形图案布置的插塞，电连接到插头的互连和插入在插头和互连之间的保护图案以选择性地暴露插头。 互连可以包括与由保护图案选择性地暴露的插头接触的连接部分。 制造半导体器件的方法包括：在形成模制图案和掩模图案之后，使用掩模图案选择性地蚀刻保护层以形成露出插头的保护图案。

    SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20110227231A1

    公开(公告)日：2011-09-22

    申请号：US13111100

    申请日：2011-05-19

    申请人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    发明人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76816 ,  H01L21/31144

    摘要： A semiconductor device may include plugs disposed in a zigzag pattern, interconnections electrically connected to the plugs and a protection pattern which is interposed between the plugs and the interconnections to selectively expose the plugs. The interconnections may include a connection portion which is in contact with plugs selectively exposed by the protection pattern. A method of manufacturing a semiconductor device includes, after forming a molding pattern and a mask pattern, selectively etching a protection layer using the mask pattern to form a protection pattern exposing a plug.

    摘要翻译： 半导体器件可以包括以锯齿形图案布置的插塞，电连接到插头的互连和插入在插头和互连之间的保护图案以选择性地暴露插头。 互连可以包括与由保护图案选择性地暴露的插头接触的连接部分。 制造半导体器件的方法包括：在形成模制图案和掩模图案之后，使用掩模图案选择性地蚀刻保护层以形成露出插头的保护图案。

    Semiconductor device and methods of manufacturing the same
    5.
    发明授权
    Semiconductor device and methods of manufacturing the same 有权
    半导体器件及其制造方法

    公开(公告)号：US07968447B2

    公开(公告)日：2011-06-28

    申请号：US12465013

    申请日：2009-05-13

    申请人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    发明人： Young-Ho Lee ,  Jae-Hwang Sim ,  Jae-Kwan Park ,  Mo-Seok Kim ,  Jong-Min Lee ,  Dong-Sik Lee

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76816 ,  H01L21/31144

    摘要： A semiconductor device may include plugs disposed in a zigzag pattern, interconnections electrically connected to the plugs and a protection pattern which is interposed between the plugs and the interconnections to selectively expose the plugs. The interconnections may include a connection portion which is in contact with plugs selectively exposed by the protection pattern. A method of manufacturing a semiconductor device includes, after forming a molding pattern and a mask pattern, selectively etching a protection layer using the mask pattern to form a protection pattern exposing a plug.

    摘要翻译： 半导体器件可以包括以锯齿形图案布置的插塞，电连接到插头的互连和插入在插头和互连之间的保护图案以选择性地暴露插头。 互连可以包括与由保护图案选择性地暴露的插头接触的连接部分。 制造半导体器件的方法包括：在形成模制图案和掩模图案之后，使用掩模图案选择性地蚀刻保护层以形成露出插头的保护图案。

    CAPACITOR STRUCTURES, DECOUPLING STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME
    7.
    发明申请
    CAPACITOR STRUCTURES, DECOUPLING STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME 有权
    电容器结构，分解结构和包括其中的半导体器件

    公开(公告)号：US20160073502A1

    公开(公告)日：2016-03-10

    申请号：US14732278

    申请日：2015-06-05

    申请人： Jong-Min Lee ,  Jongryul Jun ,  Eun A Kim ,  Jung-Bum Lim

    发明人： Jong-Min Lee ,  Jongryul Jun ,  Eun A Kim ,  Jung-Bum Lim

    IPC分类号： H05K1/16

    CPC分类号： H01L28/90 ,  H01L27/0805 ,  H01L27/10808 ,  H01L27/10817 ,  H01L27/10847 ,  H01L27/10852 ,  H01L28/82 ,  H01L28/86 ,  H01L28/88 ,  H01L28/92

    摘要： Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.

    摘要翻译： 提供去耦结构。 去耦结构可以包括第一导电图案，第二导电图案和结构上支撑第一导电图案和第二导电图案的整体支撑结构。 去耦结构还可以包括设置在第一导电图案之间和第二导电图案之间的公共电极。 第一导电图案和公共电极是第一电容器的电极，第二导电图案和公共电极是第二电容器的电极。 从平面图看，整体支撑结构可以包括开口。 第一导电图案和第二导电图案在其间具有分离区域彼此水平间隔开，并且没有一个开口延伸到分离区域中。

    Display device and a method of manufacturing the same
    8.
    发明授权
    Display device and a method of manufacturing the same 有权
    显示装置及其制造方法

    公开(公告)号：US08617910B2

    公开(公告)日：2013-12-31

    申请号：US13239822

    申请日：2011-09-22

    申请人： Jae-Han Lee ,  Jong-Min Lee ,  Sun-Kyu Son ,  Young-Il Ban ,  Ok-Kwon Shin

    发明人： Jae-Han Lee ,  Jong-Min Lee ,  Sun-Kyu Son ,  Young-Il Ban ,  Ok-Kwon Shin

    IPC分类号： H01L21/00 ,  H01L29/18 ,  H05K7/00

    CPC分类号： G02F1/13452

    摘要： A display device includes an array substrate, a driving film and an adhesive member. The array substrate includes a first base substrate, a plurality of first signal pads formed on the first base substrate and a first dummy pad formed adjacent to the first signal pads. The driving film includes a base film, a plurality of output terminals formed on the base film and a first alignment mark formed adjacent to the output terminals. The adhesive member adheres the first signal pads to the output terminals, and adheres the first dummy pad to the first alignment mark.

    摘要翻译： 显示装置包括阵列基板，驱动膜和粘合构件。 阵列基板包括第一基底基板，形成在第一基底基板上的多个第一信号焊盘和邻近第一信号焊盘形成的第一虚设焊盘。 驱动膜包括基膜，形成在基膜上的多个输出端子和邻近输出端子形成的第一对准标记。 粘合剂粘合第一信号垫到输出端，并将第一虚拟垫粘附到第一对准标记。

    DETECTION AND TRACKING RADAR, ANTI HIGH SPEED MOBILE DEFENSE SYSTEM HAVING THE SAME AND HIGH SPEED MOBILE TRACKING METHOD OF DETECTION AND TRACKING RADAR
    9.
    发明申请
    DETECTION AND TRACKING RADAR, ANTI HIGH SPEED MOBILE DEFENSE SYSTEM HAVING THE SAME AND HIGH SPEED MOBILE TRACKING METHOD OF DETECTION AND TRACKING RADAR 有权
    检测和跟踪雷达，具有相同速度的高速移动防御系统和检测和跟踪雷达的高速移动跟踪方法

    公开(公告)号：US20130027242A1

    公开(公告)日：2013-01-31

    申请号：US13579149

    申请日：2011-07-29

    申请人： Jong-Min Lee ,  Sun-gu Sun ,  Byunglae Cho ,  Jungsoo Lee ,  Sangsoon Park ,  Youn Sik Kang

    发明人： Jong-Min Lee ,  Sun-gu Sun ,  Byunglae Cho ,  Jungsoo Lee ,  Sangsoon Park ,  Youn Sik Kang

    IPC分类号： G01S13/66

    CPC分类号： G01S13/87 ,  G01S7/292 ,  G01S7/295 ,  G01S13/726

    摘要： A detection and tracking radar includes a hazardous zone set within a preset radius based on a main body having a radar, a plurality of detection and tracking sectors configured to detect a high speed mobile approaching the main body within detection areas, the detection areas being defined by diving the hazardous zone based on an azimuth angle, and a controller configured to recognize the high speed mobile as a target based upon signals received from the detection and tracking sectors and track the target. Accordingly, rapid detection and tracking of the high speed mobile can be allowed. Also, since the detection and tracking sectors can be independently run, expansion of a radar system can be free by virtue of addition of the detection and tracking sectors.

    摘要翻译： 检测和跟踪雷达包括基于具有雷达的主体设置在预设半径内的危险区域，多个检测和跟踪扇区，被配置为检测在检测区域内接近主体的高速移动站，所述检测区域被定义 通过基于方位角潜水危险区域，以及控制器，其被配置为基于从检测和跟踪扇区接收的信号识别高速移动站作为目标，并跟踪目标。 因此，可以允许高速移动的快速检测和跟踪。 此外，由于可以独立地运行检测和跟踪扇区，所以通过添加检测和跟踪扇区，雷达系统的扩展可以是自由的。