公开(公告)号：US20100195389A1

公开(公告)日：2010-08-05

申请号：US12697542

申请日：2010-02-01

申请人： Jaehong KIM ,  Hong-rak SON ,  Jun-jin KONG ,  Yoo-cheol SHIN

发明人： Jaehong KIM ,  Hong-rak SON ,  Jun-jin KONG ,  Yoo-cheol SHIN

IPC分类号： G11C16/04

CPC分类号： G11C16/3418 ,  G11C11/5621

摘要： Multilevel flash memory and methods of programming/reading flash memory are disclosed. The multilevel flash memory device comprises a status detector configured to detect whether or not a target memory cell is programmed to an erase state, and a control logic unit controlling a program voltage applied to a neighboring memory cell adjacent to the target memory cell and to be programmed to one of a plurality of standard program states, such that the neighboring memory cell is programmed to a corresponding one of a plurality of correction program states different from the one of the plurality of standard program states.

摘要翻译： 公开了多级闪存和编程/读取闪存的方法。 多级闪速存储装置包括：状态检测器，被配置为检测目标存储单元是否被编程为擦除状态;以及控制逻辑单元，控制施加到与目标存储器单元相邻的相邻存储单元的编程电压，并且为 被编程为多个标准程序状态之一，使得相邻存储器单元被编程为与多个标准程序状态之一不同的多个校正程序状态中的对应的一个。

公开(公告)号：US20110276777A1

公开(公告)日：2011-11-10

申请号：US13096036

申请日：2011-04-28

申请人： Kyoung Lae CHO ,  Kwang Ho KIM ,  Jun Jin KONG ,  Jaehong KIM ,  Hong Rak SON

发明人： Kyoung Lae CHO ,  Kwang Ho KIM ,  Jun Jin KONG ,  Jaehong KIM ,  Hong Rak SON

IPC分类号： G06F12/10

CPC分类号： H03M7/30

摘要： A method of storing data in a storage medium of a data storage device comprises storing input data in the storage medium, and reading the input data from the storage medium and compressing the read data during a background operation of the data storage device.

摘要翻译： 一种在数据存储装置的存储介质中存储数据的方法包括将输入数据存储在存储介质中，并且在数据存储装置的后台操作期间从存储介质读取输入数据并压缩读取的数据。

公开(公告)号：US20100332737A1

公开(公告)日：2010-12-30

申请号：US12780979

申请日：2010-05-17

申请人： Han-woong YOO ,  Jaehong KIM ,  Jun-jin KONG

发明人： Han-woong YOO ,  Jaehong KIM ,  Jun-jin KONG

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7209

摘要： A flash memory preprocessing system comprises at least one flash memory device, a memory controller controlling program and read operations of the at least one flash memory device, and a flash preprocessor receiving program data from an external source, generating preprocessed data by converting the received program data, and outputting the preprocessed data to the memory controller. The memory controller controls the at least one flash memory device to perform a program operation on the at least one flash memory device according to the preprocessed data.

摘要翻译： 闪存预处理系统包括至少一个闪存器件，存储器控制器控制程序和至少一个闪速存储器件的读取操作，以及从外部源接收程序数据的闪速预处理器，通过转换所接收的程序来产生预处理数据 数据，并将预处理的数据输出到存储器控制器。 所述存储器控制器控制所述至少一个闪速存储器件，以根据所述预处理数据对所述至少一个闪存器件执行编程操作。

公开(公告)号：US20100118608A1

公开(公告)日：2010-05-13

申请号：US12614545

申请日：2009-11-09

申请人： Seung-Hwan SONG ,  Jaehong KIM ,  Kyoung Lae CHO ,  Yong June KIM ,  Jun Jin KONG ,  Jong Han KIM

发明人： Seung-Hwan SONG ,  Jaehong KIM ,  Kyoung Lae CHO ,  Yong June KIM ,  Jun Jin KONG ,  Jong Han KIM

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C29/00 ,  G11C2211/5634

摘要： A non-volatile semiconductor memory device and related method of determining a read voltage are disclosed. The non-volatile semiconductor memory device includes; a memory cell array including a plurality of memory cells, a read voltage determination unit configured to determine an optimal read voltage by comparing reference data obtained during a program operation with comparative data obtained during a subsequent read operation and changing a current read voltage to a new read voltage based on a result of the comparison, and a read voltage generation unit configured to generate the new read voltage in response to a read voltage control signal provided by the read voltage determination unit.

摘要翻译： 公开了一种非易失性半导体存储器件及确定读取电压的相关方法。 非易失性半导体存储器件包括： 包括多个存储单元的存储单元阵列，读电压确定单元，被配置为通过将在编程操作期间获得的参考数据与在随后的读取操作期间获得的比较数据进行比较来确定最佳读取电压，并将当前读取电压改变为新的 基于比较结果的读取电压和读取电压生成单元，被配置为响应于由读取电压确定单元提供的读取电压控制信号而产生新的读取电压。

公开(公告)号：US20110261267A1

公开(公告)日：2011-10-27

申请号：US13084914

申请日：2011-04-12

申请人： Jaehong KIM ,  Haesoo LEE

发明人： Jaehong KIM ,  Haesoo LEE

IPC分类号： H04N5/63

CPC分类号： H04N5/63 ,  H04N21/42202 ,  H04N21/4436 ,  H04N21/485 ,  H04N21/4882

摘要： Provided are an electronic device and a method for controlling the same. The electronic device comprises a communication unit for receiving electricity service charge information and a controller for outputting a control signal to control output property to output predetermined contents based on the received electricity service charge information.

摘要翻译： 提供一种电子设备及其控制方法。 电子设备包括用于接收电力服务费用信息的通信单元和用于输出控制信号以控制输出特性以便根据所接收的电力服务费用信息输出预定内容的控制器。

公开(公告)号：US20130198440A1

公开(公告)日：2013-08-01

申请号：US13746640

申请日：2013-01-22

申请人： Eun Chu OH ,  Jaehong KIM ,  Jongha KIM ,  Junjin KONG

发明人： Eun Chu OH ,  Jaehong KIM ,  Jongha KIM ,  Junjin KONG

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5646 ,  H01L27/11582

摘要： In one embodiment, the method includes overwriting a memory cell storing m-bit data to store n-bit data, where n is less than or equal to m. The memory cell has one of a first plurality of program states when storing the m-bit data, and the memory cell has one of a second plurality of program states when storing the n-bit data. The second plurality of program states include at least one program state not in the first plurality of program states.

摘要翻译： 在一个实施例中，该方法包括重写存储m位数据以存储n位数据的存储单元，其中n小于或等于m。 当存储m位数据时，存储单元具有第一多个程序状态之一，并且当存储n位数据时存储单元具有第二多个程序状态之一。 第二多个程序状态包括不在第一多个程序状态中的至少一个程序状态。

公开(公告)号：US20130160952A1

公开(公告)日：2013-06-27

申请号：US13599548

申请日：2012-08-30

申请人： Yisung HWANG ,  Jungchul LEE ,  Jaehong KIM ,  Taegyeong CHUNG

发明人： Yisung HWANG ,  Jungchul LEE ,  Jaehong KIM ,  Taegyeong CHUNG

IPC分类号： H01L21/46

CPC分类号： H01L21/67144 ,  H01L2924/0002 ,  Y10T156/1744 ,  Y10T156/1746 ,  Y10T156/1761 ,  Y10T156/1776 ,  H01L2924/00

摘要： An apparatus for bonding semiconductor chips may comprise transfer rails configured to transfer substrates, loading members configured to load the substrates onto the transfer rails, unloading members configured to unload the substrates from the transfer rails, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates. An apparatus for bonding semiconductor chips may comprise a transfer rail configured to transfer substrates, loading members configured to load the substrates onto the transfer rail, unloading members configured to unload the substrates from the transfer rail, a buffer member at a side of the transfer rail configured to temporarily receive the substrates loaded by the loading members, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates.

摘要翻译： 用于接合半导体芯片的装置可以包括被配置为传送基板的传送轨道，被配置为将基板装载到传送轨道上的装载部件，被配置为从传送轨道卸载基板的卸载部件;第一晶片供给单元，被配置为提供第一晶片 包括半导体芯片和/或被配置为将半导体芯片接合到基板的接合单元。 一种用于接合半导体芯片的设备可以包括：传送轨道，其被配置为传送基板，被配置为将基板装载到传送轨道上的装载部件，被配置为从传送轨道卸载基板的卸载部件;在传送轨道侧的缓冲部件 被配置为临时接收由所述加载部件加载的基板，被配置为提供包括半导体芯片的第一晶片的第一晶片供给单元和/或被配置为将所述半导体芯片接合到所述基板的接合单元。

公开(公告)号：US20110258667A1

公开(公告)日：2011-10-20

申请号：US13046495

申请日：2011-03-11

申请人： Jaehong KIM ,  Haesoo LEE ,  Woohyun PAIK

发明人： Jaehong KIM ,  Haesoo LEE ,  Woohyun PAIK

IPC分类号： H04N5/63 ,  H04N5/445

CPC分类号： H04N5/63 ,  H04N5/44543 ,  H04N21/4334 ,  H04N21/44209 ,  H04N21/458 ,  H04N21/478

摘要： An electronic device and a method of controlling the electronic device are provided. The electronic device includes a broadcast receiving unit that receives a broadcast content, a communication unit that receives power information associated with a mart grid, the power information including at least one of per-time slot electricity rate information and power demand information, and a controller that selectively performs one of an operation of outputting the broadcast content received through the broadcast receiving unit and an operation of storing the received broadcast content in an internal memory or an external memory considering the received power information.

摘要翻译： 提供了电子设备和控制电子设备的方法。 电子设备包括：广播接收单元，其接收广播内容;通信单元，其接收与市场网格相关联的功率信息;所述功率信息包括每时隙电费信息和功率需求信息中的至少一个;以及控制器 选择性地执行输出通过广播接收单元接收的广播内容的操作中的一种，以及考虑所接收的功率信息将接收的广播内容存储在内部存储器或外部存储器中的操作。

公开(公告)号：US20110125975A1

公开(公告)日：2011-05-26

申请号：US12944807

申请日：2010-11-12

申请人： Jaehong KIM ,  Hee-Seok Eun ,  Ki-Jun Lee ,  Yong-June Kim

发明人： Jaehong KIM ,  Hee-Seok Eun ,  Ki-Jun Lee ,  Yong-June Kim

IPC分类号： G06F12/06 ,  G06F5/00

CPC分类号： G06F12/0607 ,  G06F2212/7208

摘要： An interleaving apparatus may include a first buffer unit configured to buffer input data in units having a size of a sector to generate sector unit data, an encoding unit configured to encode the sector unit data and generate a plurality of parity codes based on the encoding, a second buffer unit configured to interleave the sector unit data and the parity codes and generate interleaving data based on the interleaving, the second buffer unit including a plurality of output buffers configured to store the interleaving data, and an output unit configured to output the interleaving data.

摘要翻译： 交错装置可以包括：第一缓冲器单元，被配置为以具有扇区大小的单位缓冲输入数据以产生扇区单元数据;编码单元，被配置为对扇区单元数据进行编码，并且基于编码生成多个奇偶校验码， 第二缓冲器单元，被配置为交织扇区单元数据和奇偶校验码，并且基于交织产生交织数据，第二缓冲单元包括被配置为存储交织数据的多个输出缓冲器，以及输出单元，其被配置为输出交织 数据。

公开(公告)号：US20100103731A1

公开(公告)日：2010-04-29

申请号：US12558627

申请日：2009-09-14

申请人： Han Woong YOO ,  Seung-Hwan SONG ,  Junjin KONG ,  Jaehong KIM

发明人： Han Woong YOO ,  Seung-Hwan SONG ,  Junjin KONG ,  Jaehong KIM

IPC分类号： G11C16/04

CPC分类号： G11C16/26 ,  G11C16/3427

摘要： A distribution analyzing method for a nonvolatile memory device having memory cells exhibiting overlapping first and second threshold voltage distributions includes; detecting a degree of overlap between the first and second threshold voltage distributions by reading data stored in the memory cells and determining read index data from the read data, and estimating a distribution characteristic for at least one of the overlapping threshold voltage distributions using the read index data.

摘要翻译： 一种具有显示重叠的第一和第二阈值电压分布的存储单元的非易失性存储器件的分布分析方法包括： 通过读取存储在存储单元中的数据并根据读取的数据确定读取的索引数据来检测第一和第二阈值电压分布之间的重叠程度，并且使用读取的索引来估计至少一个重叠阈值电压分布的分布特性 数据。