Constant gain controller for active queue management
    1.
    发明授权
    Constant gain controller for active queue management 有权
    恒定增益控制器,用于主动队列管理

    公开(公告)号:US07336672B1

    公开(公告)日:2008-02-26

    申请号:US10422796

    申请日:2003-04-25

    IPC分类号: H04L12/28

    摘要: Various techniques for queue management based on random early detection (RED) are disclosed herein. In particular, a method for generating a drop probability for an incoming packet in a device having a queue to buffer packets between segments of a network is provided. The method comprises determining, upon receipt of an incoming packet, a size of the queue and determining an error based at least in part on a difference between the queue size and a threshold. The method further comprises determining a drop probability for the incoming packet based at least in part on the error and a constant gain factor. The constant gain factor may be based at least in part on a linearized second order dynamic model of the network.

    摘要翻译: 本文中公开了基于随机早期检测(RED)的队列管理的各种技术。 特别地,提供了一种用于在具有队列以在网络的段之间缓冲分组的设备中生成用于输入分组的丢弃概率的方法。 该方法包括在接收到传入分组时确定队列的大小并且至少部分地基于队列大小与阈值之间的差异来确定错误。 该方法还包括至少部分地基于误差和恒定增益因子确定输入分组的丢弃概率。 恒定增益因子可以至少部分地基于网络的线性化二阶动态模型。

    Buffer management scheme employing dynamic thresholds
    2.
    发明授权
    Buffer management scheme employing dynamic thresholds 失效
    缓存管理方案采用动态阈值

    公开(公告)号:US06788697B1

    公开(公告)日:2004-09-07

    申请号:US09635898

    申请日:2000-08-11

    IPC分类号: H04L1226

    摘要: An improved buffer management process is disclosed wherein the buffer is shared among a plurality of packet queues. The improved buffer management process comprises computing a common queue threshold value based upon the aggregate size of the plurality of packet queues and a predetermined buffer threshold value. The common queue threshold value is then used to manage the size of each of the plurality of packet queues and thereby manage the buffer.

    摘要翻译: 公开了一种改进的缓冲器管理过程,其中缓冲器在多个分组队列之间共享。 改进的缓冲器管理过程包括基于多个分组队列的聚合大小和预定的缓冲器阈值来计算公共队列阈值。 然后使用公共队列阈值来管理多个分组队列中的每一个的大小,从而管理缓冲器。

    Scheduling of upstream traffic in a TDMA wireless communications system
    3.
    发明授权
    Scheduling of upstream traffic in a TDMA wireless communications system 有权
    在TDMA无线通信系统中调度上行流量

    公开(公告)号:US06657983B1

    公开(公告)日:2003-12-02

    申请号:US09429014

    申请日:1999-10-29

    IPC分类号: H04B7212

    CPC分类号: H04B7/2646

    摘要: A method of allocating bandwidth for transmitting upstream cells from a CPE unit to a BTS. The CPE determines arrival time information associated with each cell and sends arrival time information associated with at least one cell to the BTS. The BTS allocates future bandwidth to the CPE as a function of the arrival time information received from the CPE. For example, the BTS estimates the number of cell arrivals occurring in the current scheduling period based on past cell arrival times. The BTS then sends information to the CPE in which the allocated future bandwidth is specified. Finally, the CPE groups a number of cells into a burst packet occupying the allocated bandwidth and sends the burst packet to the BTS. Rather than respond in a delayed manner to a bandwidth deficiency or surplus at an individual CPE unit, the BTS produces an estimate of a CPE unit's bandwidth demands, resulting in more efficient bandwidth utilization and reduced cell loss ratio.

    摘要翻译: 分配用于从CPE单元向BTS发送上行小区的带宽的方法。 CPE确定与每个小区相关联的到达时间信息,并将与至少一个小区相关联的到达时间信息发送到BTS。 作为从CPE接收的到达时间信息的函数,BTS将CPE的未来带宽分配给CPE。 例如,BTS基于过去的小区到达时间估计在当前调度周期中发生的小区到达的数量。 BTS然后向CPE发送信息,其中指定了分配的未来带宽。 最后,CPE将多个小区分组成占用分配带宽的突发分组,并将突发分组发送到BTS。 不是以延迟的方式响应单个CPE单元的带宽不足或剩余,所以BTS产生CPE单元的带宽需求的估计,导致更有效的带宽利用和减少的信元丢失率。

    Differential timing transfer over synchronous ethernet using digital frequency generators and control word signaling
    4.
    发明授权
    Differential timing transfer over synchronous ethernet using digital frequency generators and control word signaling 失效
    使用数字频率发生器和控制字信号的同步以太网的差分定时传输

    公开(公告)号:US08467418B2

    公开(公告)日:2013-06-18

    申请号:US12268008

    申请日:2008-11-10

    IPC分类号: H04J3/06

    摘要: A method, system and master service interface transfer differential timing over a packet network. The transmitting service interface receives a service clock and is coupled to a receiving service interface through a network backplane. A primary reference clock is provided to time the network backplane. The primary reference clock and the service clock are used to synthesize a copy of the service clock connected to the transmitting service interface. A first control word containing an error differential between the service clock and the synthesized copy of the service clock is generated and transmitted through the network backplane via a packet. The first control word, together with the primary reference clock, is used to recreate the service clock for timing the receiving service interface.

    摘要翻译: 一种方法,系统和主服务接口通过分组网络传输差分定时。 发送业务接口接收业务时钟,通过网络背板耦合到接收业务接口。 提供主参考时钟来对网络背板进行时间。 主参考时钟和服务时钟用于合成连接到发送服务接口的业务时钟的副本。 生成服务时钟和服务时钟的合成副本之间的误差的第一个控制字,并经由分组通过网络背板发送。 第一个控制字与主参考时钟一起用于重新创建用于定时接收服务接口的服务时钟。

    PROTOCOL FOR CLOCK DISTRIBUTION AND LOOP RESOLUTION
    5.
    发明申请
    PROTOCOL FOR CLOCK DISTRIBUTION AND LOOP RESOLUTION 失效
    时钟分配和环路分辨率协议

    公开(公告)号:US20120182863A1

    公开(公告)日:2012-07-19

    申请号:US13362319

    申请日:2012-01-31

    IPC分类号: H04L12/44 H04L12/26

    CPC分类号: H04L41/12 H04J3/0679

    摘要: In response to a network topology change, a clock root node calculates a new clock path for each affected node by building a clock source topology tree, and identifying from that tree a path to the network node from a clock source of higher or equal stratum relative to that network node. The root node then sends a network message to each node indicating the new path that the node should use. Each node receives the message and compares the new path with the existing path. If the paths are different then the node acquires the new path just received in the message. If the paths are the same then the node does nothing and discards the message.

    摘要翻译: 响应于网络拓扑变化,时钟根节点通过构建时钟源拓扑树来为每个受影响的节点计算新的时钟路径,并且从该树中识别来自较高或相等层次的时钟源的网络节点的路径 到该网络节点。 根节点然后向每个节点发送一个网络消息,指示节点应该使用的新路径。 每个节点接收消息,并将新路径与现有路径进行比较。 如果路径不同,则节点获取刚刚在消息中接收到的新路径。 如果路径相同,则节点不执行任何操作并丢弃该消息。

    Timestamp-based all digital phase locked loop for clock synchronization over packet networks
    6.
    发明授权
    Timestamp-based all digital phase locked loop for clock synchronization over packet networks 有权
    基于时间戳的全数字锁相环,用于通过分组网络进行时钟同步

    公开(公告)号:US07656985B1

    公开(公告)日:2010-02-02

    申请号:US11279431

    申请日:2006-04-12

    IPC分类号: H03D3/24

    摘要: A timestamp-based all digital phase locked loop is utilized for clock synchronization for Circuit Emulation Service (“CES”) over packet networks. The all digital phase locked loop at a CES receiver includes a phase detector, a loop filter, a digital oscillator and a timestamp counter. The all digital phase locked loop enables the CES receiver to synchronize a local clock at the receiver with a clock at a CES transmitter, where indications of transmitter clock signals are communicated to the receiver as timestamps. The phase detector is operable to compute an error signal indicative of differences between the timestamps and a local clock signal. The loop filter is operable to reduce jitter and noise in the error signal, and thereby produce a control signal. The digital oscillator is operable to oscillate at a frequency based at least in-part on the control signal, and thereby produce a digital oscillator output signal. The timestamp counter operable to count pulses in the digital oscillator output signal, and output the local clock signal.

    摘要翻译: 基于时间戳的全数字锁相环用于通过分组网络进行电路仿真服务(“CES”)的时钟同步。 CES接收机的全数字锁相环包括相位检测器,环路滤波器,数字振荡器和时间戳计数器。 全数字锁相环使得CES接收机能够使接收机处的本地时钟与CES发射机的时钟同步,其中发射机时钟信号的指示作为时间戳传送到接收机。 相位检测器可用于计算指示时间戳与本地时钟信号之间的差异的误差信号。 环路滤波器可操作以减少误差信号中的抖动和噪声,从而产生控制信号。 数字振荡器可操作以至少部分地基于控制信号以频率振荡,从而产生数字振荡器输出信号。 时间戳计数器可用于对数字振荡器输出信号中的脉冲进行计数,并输出本地时钟信号。

    High throughput rotator switch having excess tandem buffers
    7.
    发明授权
    High throughput rotator switch having excess tandem buffers 失效
    高通量旋转开关具有多余的串联缓冲器

    公开(公告)号:US07545804B2

    公开(公告)日:2009-06-09

    申请号:US10659320

    申请日:2003-09-11

    IPC分类号: H04L12/54 H04L12/56

    CPC分类号: H04L49/103 H04L49/1553

    摘要: A rotator switch including more tandem buffers than inputs is disclosed. An input data conditioner formats data to be transferred from the multiple inputs to the tandem buffers. Excess tandem buffers allow data to be transferred from inputs to tandem buffers at a rate less than the rate at which data arrives at the inputs. Excess capacity of the switch fabric may be used to carry overhead, or slow the rate at which data is transferred to the switch fabric.

    摘要翻译: 公开了包括比输入更多的串联缓冲器的旋转开关。 输入数据调节器将要从多个输入传送到串联缓冲器的数据。 过多的串联缓冲器允许数据以低于数据到达输入的速率的速率从输入传输到串联缓冲器。 交换结构的过多容量可能用于携带开销,或者减慢数据传输到交换结构的速率。

    Method and apparatus for encoding a plurality of pre-defined codes into a search key and for locating a longest matching pre-defined code
    9.
    发明授权
    Method and apparatus for encoding a plurality of pre-defined codes into a search key and for locating a longest matching pre-defined code 失效
    用于将多个预定义代码编码到搜索关键字中并用于定位最长匹配的预定义代码的方法和装置

    公开(公告)号:US06993025B1

    公开(公告)日:2006-01-31

    申请号:US09475308

    申请日:1999-12-30

    IPC分类号: H04L12/28

    摘要: A method of encoding a plurality of pre-defined codes into a search key and a method of using the search key to locate a longest matching pre-defined code to a given code is disclosed. Encoding the pre-defined codes into a search key involves producing a prefix node bit array (PNBA) having a plurality of bit positions corresponding to possible bit combinations of a bit string having a length equal to or less than the longest predefined code in said plurality of said pre-defined codes such that said bit positions are arranged by the lengths of said possible bit combinations and by numeric value of said possible bit combinations and to setting bits active in bit positions which correspond to bit combinations identified by said pre-defined codes. The method of locating involves producing a search mask encoding at least one portion of said given code and comparing said search mask to a search key having a Prefix Node Bit Array (PNBA) in which a bit is set active in at least one of a plurality of bit positions corresponding to possible bit combinations of bits in a bit string having a length equal to or less than the longest predefined code in said plurality of said pre-defined codes and arranged by the lengths of said possible bit combinations and by numeric values of said bit combinations, to identify a common active bit position in said search key and said search mask corresponding to a one of said pre-defined codes having a length greater than all others of said pre-defined codes which correspond to common active bit positions.

    摘要翻译: 公开了一种将多个预定义代码编码成搜索关键字的方法,以及使用搜索关键字将最长匹配的预定义代码定位到给定代码的方法。 将预定义代码编码到搜索关键字中涉及产生具有多个比特位置的前缀节点比特阵列(PNBA),该多个比特位置对应于长度等于或小于所述多个中最长预定义码长度的比特串的可能比特组合 的所述预定义代码,使得所述位位置由所述可能位组合的长度和所述可能位组合的数值排列,并且设置位对应于由所述预定义代码识别的位组合的位位置中的位 。 定位方法涉及产生编码所述给定代码的至少一部分的搜索掩码,并将所述搜索掩码与具有前缀节点比特阵列(PNBA)的搜索关键字进行比较,其中将比特设置为多个 对应于具有等于或小于所述多个所述预定义代码中的最长预定义代码的长度的比特串中的比特的可能比特组合的比特位置,并且由所述可能比特组合的长度和数字值 所述比特组合,用于识别所述搜索关键字中的公共活动比特位置,并且所述搜索掩码对应于所述预定义码之一,其长度大于对应于公共活动比特位置的所述预定义码的所有其他长度。