Input/output (I/O) holdoff mechanism for use in a system where I/O
device inputs are fed through a latency introducing bus
    1.
    发明授权
    Input/output (I/O) holdoff mechanism for use in a system where I/O device inputs are fed through a latency introducing bus 失效
    输入/输出(I / O)抑制机制,用于通过延迟引入总线馈送I / O设备输入的系统

    公开(公告)号:US5664213A

    公开(公告)日:1997-09-02

    申请号:US504936

    申请日:1995-07-20

    摘要: An I/O holdoff mechanism is used to compensate for I/O device inputs being fed through a latency introducing bus. A system includes one or more I/O devices connected through a serial bus to a controller device. Each I/O device includes at least one request pin which is connected to a peripheral device. A serializer in the I/O device responds to a voltage transition occurring on any request pin of the I/O device by forwarding, in a packet over the serial bus, an indicator. The indicator indicates a current voltage on the request pin of the I/O device on which the voltage transition occurred. The controller device includes a deserializer and a bus controller. The deserializer receives the first packet and outputs a signal which indicates a current value for the voltage on the indicated request pin. The deserializer includes a busy output which indicates when the deserializer is busy and when the deserializer is idle. The bus controller responds to a request from a host system for a current value on a first request pin of the I/O device by forwarding to the host system a current value for a voltage on the indicated request pin, as indicated by the deserializer, when the deserializer is not busy. When the deserializer is busy, the bus controller responds to the request from the host system for the current value on the first request pin of the I/O device by waiting for the deserializer to become idle. Upon the deserializer becoming idle, the bus controller forwards to the host system the current value for the voltage on the indicated request pin.

    摘要翻译: 使用I / O缓存机制来补偿通过延迟引入总线馈送的I / O设备输入。 系统包括通过串行总线连接到控制器设备的一个或多个I / O设备。 每个I / O设备包括至少一个连接到外围设备的请求引脚。 I / O设备中的串行器响应I / O设备的任何请求引脚上发生的电压转换,通过串行总线上的数据包转发一个指示器。 该指示灯表示发生电压转换的I / O设备的请求引脚上的当前电压。 控制器设备包括解串器和总线控制器。 解串器接收第一个数据包,并输出指示指示的请求引脚上的电压的当前值的信号。 解串器包括一个忙输出,指示解串器何时正在忙和解串器空闲时。 总线控制器通过向主机系统转发指示的请求引脚上的电压的当前值,如由解串器指示的那样,响应来自主机系统对于I / O设备的第一请求引脚上的当前值的请求, 当解串器不忙时。 当解串器处于忙时,总线控制器通过等待解串器空闲来响应来自主机系统对I / O设备的第一个请求引脚上当前值的请求。 在解串器变为空闲状态时,总线控制器向主机系统转发指定请求引脚上的电压的当前值。

    Encoding assertion and de-assertion of interrupt requests and DMA
requests in a serial bus I/O system
    2.
    发明授权
    Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system 失效
    在串行总线I / O系统中编码断言和解除中断请求和DMA请求

    公开(公告)号:US5634069A

    公开(公告)日:1997-05-27

    申请号:US503795

    申请日:1995-07-18

    摘要: A computing system encodes and emulates requests signals, such as DMA requests or interrupt requests. A first peripheral device is connected to a first request pin of a first input/output (I/O) device. When the first peripheral device asserts a first request signal on the first request pin, a serializer within the first I/O device generates a first packet. The serializer forwards the first packet to a serial out port of the first I/O device. The first packet identifies the type of request and the direction of the edge transition. The serial out port forwards the first packet to a serial in port of a controller device. Upon the serial in port receiving the first packet, an unserializer within the controller device asserts an emulated first request signal, the emulated first request signal being coupled to a first request controller within the controller device. When the first peripheral device de-asserts the first request signal on the first request pin of the first I/O device, the serializer generates a second packet. The second packet identifies the type of request and the direction of the edge transition. The serializer forwards the second packet to the serial out port of the first I/O device. The serial out port of the first I/O device forwards the second packet to the serial in port of the controller device. Upon the serial in port receiving the second packet, the unserializer within the request controller de-asserts the emulated first request signal. When the first peripheral device pulses the first request signal by quickly de-asserting and asserting the first request signal in quick succession, the second packet is sent, but not the first packet.

    摘要翻译: 计算系统对DMA请求或中断请求等请求信号进行编码和仿真。 第一外围设备连接到第一输入/输出(I / O)设备的第一请求引脚。 当第一外围设备在第一请求引脚上断言第一请求信号时,第一I / O设备内的串行器产生第一分组。 串行器将第一个数据包转发到第一个I / O设备的串行输出端口。 第一个数据包标识请求的类型和边沿转换的方向。 串行端口将第一个数据包转发到控制器设备的串行端口。 在串行端口接收第一分组时,控制器设备内的非串行化器断言模拟的第一请求信号,仿真的第一请求信号耦合到控制器设备内的第一请求控制器。 当第一外围设备在第一I / O设备的第一请求引脚上取消断言第一请求信号时,串行器产生第二分组。 第二个分组标识请求的类型和边缘转换的方向。 串行器将第二个数据包转发到第一个I / O设备的串行输出端口。 第一个I / O设备的串行端口将第二个数据包转发到控制器设备的串口。 在串行端口接收第二分组时,请求控制器内的非串行化器取消断言仿真的第一请求信号。 当第一外围设备通过快速地取消断言和断言第一请求信号来脉冲第一请求信号时,发送第二个分组,而不是第一个分组。

    System and method for power management in a Java accelerator environment
    3.
    发明授权
    System and method for power management in a Java accelerator environment 有权
    用于Java加速器环境中的电源管理的系统和方法

    公开(公告)号:US06766460B1

    公开(公告)日:2004-07-20

    申请号:US09645468

    申请日:2000-08-23

    IPC分类号: G06F128

    CPC分类号: G06F9/3879 G06F1/3203

    摘要: A power management method is disclosed which provides power management for a hardware based Java accelerator. Initially, a Java mode signal is provided from a host processor in response to initiating a Java application. Thereafter, power to the host processor is reduced, and power to a Java processor is increased in response to the Java mode signal. Then, when execution of the Java application halts, a Java completion signal is generated from the Java processor, thus signaling the system to return control back to the host processor.

    摘要翻译: 公开了一种为基于硬件的Java加速器提供功率管理的功率管理方法。 最初,响应于启动Java应用程序,从主机处理器提供Java模式信号。 此后,减少了对主处理器的电力,并且响应于Java模式信号而增加了对Java处理器的供电。 然后,当Java应用程序的执行停止时,从Java处理器生成Java完成信号,从而发信号通知系统将控制返回到主机处理器。

    Intelligent power management interface for computer system hardware
    4.
    发明授权
    Intelligent power management interface for computer system hardware 失效
    智能电源管理接口,用于计算机系统硬件

    公开(公告)号:US06105142A

    公开(公告)日:2000-08-15

    申请号:US799099

    申请日:1997-02-11

    IPC分类号: G06F1/32 G06F9/46

    CPC分类号: G06F9/46 G06F1/3203

    摘要: A method and apparatus for managing power consumption in a computer system wherein the method and apparatus is compliant with the proposed Advanced Configuration and Power Interface (ACPI) specification. In one embodiment, a power management processor is sandwiched between platform hardware and the ACPI register layer. The processor processes all operating power management commands and requests while remaining transparent to the user and the operating system. In so doing, routine power management functions, so classified by the operating system, are implemented by the operating system. Sophisticated power management features, on the other hand, are implemented by the present invention independent from operating system control. Accordingly, in the present invention, the operating system need not suspend processing of other threads to process sophisticated power management procedures.

    摘要翻译: 一种用于管理计算机系统中的功耗的方法和装置,其中所述方法和装置符合所提出的高级配置和电源接口(ACPI)规范。 在一个实施例中,电源管理处理器夹在平台硬件和ACPI寄存器层之间。 处理器处理所有操作电源管理命令和请求,同时对用户和操作系统保持透明。 这样做,由操作系统分类的日常电源管理功能由操作系统实现。 另一方面,复杂的电源管理功能由独立于操作系统控制的本发明实现。 因此,在本发明中,操作系统不需要暂停其他线程的处理来处理复杂的电源管理过程。

    Color signature detection of objects on a computer display
    5.
    发明授权
    Color signature detection of objects on a computer display 失效
    计算机显示器上的对象的颜色签名检测

    公开(公告)号:US5995112A

    公开(公告)日:1999-11-30

    申请号:US879152

    申请日:1997-06-19

    IPC分类号: G06F3/033 G06F3/048 A63F9/22

    摘要: A method and system for detecting objects displayed on a display screen is described. Each object displayed on the screen visually emits a unique identification signal in the form of a color signal having multiple color components. The relative peak amplitude of each color component in the color signal is detected by sampling the color signal with photo-sensors corresponding to each color component. The sampled color components are digitized and transmitted to the display screen graphics controller thereby indicating to the controller the object on the screen at which the detector is pointed.

    摘要翻译: 描述用于检测显示在显示屏幕上的物体的方法和系统。 显示在屏幕上的每个物体目视地发出具有多个颜色分量的彩色信号形式的唯一识别信号。 通过对与每个颜色分量相对应的光电传感器对彩色信号进行采样,来检测彩色信号中每个颜色分量的相对峰值幅度。 采样的颜色分量被数字化并传输到显示屏图形控制器,从而向控制器指示检测器指向的屏幕上的对象。

    Keyboard controller with integrated real time clock functionality and
method therefor
    6.
    发明授权
    Keyboard controller with integrated real time clock functionality and method therefor 失效
    具有集成实时时钟功能的键盘控制器及其方法

    公开(公告)号:US5854915A

    公开(公告)日:1998-12-29

    申请号:US755202

    申请日:1996-11-22

    IPC分类号: G06F1/14 G06F3/023 H03K17/94

    CPC分类号: G06F3/023 G06F1/14

    摘要: A keyboard controller for a computer system with integrated Real Time Clock (RTC) functionality. The keyboard controller has a microprocessor for controlling peripheral device bus traffic such as keyboard and mouse traffic. The microprocessor also acts as a boot device for the computer system. By programming the microprocessor to emulate RTC functions, adding a divider circuit, and having an I/O support block which stores RTC registers and an extended CMOS RAM memory block, the entire RTC FSB along with its power detection and switching circuit can be removed.

    摘要翻译: 具有集成实时时钟(RTC)功能的计算机系统的键盘控制器。 键盘控制器具有用于控制诸如键盘和鼠标流量的外围设备总线流量的微处理器。 微处理器还充当计算机系统的引导设备。 通过编程微处理器来模拟RTC功能,添加分频器电路,并具有存储RTC寄存器和扩展CMOS RAM存储器块的I / O支持块,可以将整个RTC FSB及其电源检测和开关电路一起除去。

    System and method for low overhead boundary checking of java arrays
    8.
    发明授权
    System and method for low overhead boundary checking of java arrays 有权
    java数组的低开销边界检查的系统和方法

    公开(公告)号:US06782407B1

    公开(公告)日:2004-08-24

    申请号:US09670496

    申请日:2000-09-26

    IPC分类号: G06F900

    CPC分类号: G06F9/44589

    摘要: An array boundary checking method is disclosed for providing hardware based array boundary checking in a Java environment. During the first machine cycle of a current array access command, an array reference value is loaded into a system-data address controller and an array boundary checker. Next, during the second machine cycle of the current array access command, an array index value is written to the system-data address controller and the array boundary checker. Also during the second machine cycle of the current array access command, a maximum array index value is read from the Java array and written to the array boundary checker. The array boundary checker utilizes these values to determine the validity of the current array access command. Finally, during the third machine cycle an array value is accessed in memory. In the present invention the array value is only accessed when the current array access command is valid.

    摘要翻译: 公开了一种用于在Java环境中提供基于硬件的数组边界检查的阵列边界检查方法。 在当前阵列访问命令的第一个机器周期期间,阵列参考值被加载到系统数据地址控制器和阵列边界检查器中。 接下来,在当前阵列访问命令的第二个机器周期期间,将数组索引值写入系统数据地址控制器和阵列边界检查器。 同样在当前数组访问命令的第二个机器周期期间,从Java数组读取最大数组索引值并写入数组边界检查器。 阵列边界检查器利用这些值来确定当前阵列访问命令的有效性。 最后,在第三个机器周期期间,在存储器中访问数组值。 在本发明中,仅在当前阵列访问命令有效时才访问阵列值。

    Detection of objects on a computer display
    9.
    发明授权
    Detection of objects on a computer display 失效
    检测计算机显示屏上的物体

    公开(公告)号:US5999171A

    公开(公告)日:1999-12-07

    申请号:US878866

    申请日:1997-06-19

    IPC分类号: G06F3/038 G09G1/00

    CPC分类号: G06F3/0386

    摘要: A method and system of detecting objects displayed on a display screen is described. Each object displayed on the screen visually emits a unique identification signal. The identification signal or lack of an identification signal is detected by a detector such as a light pen or video gun and the detector transmits the identification signal on a serial bus to the display screen graphics controller thereby indicating to the controller the position on the screen at which the detector is pointed.

    摘要翻译: 描述检测显示在显示屏上的物体的方法和系统。 屏幕上显示的每个物体都可视地发出独特的识别信号。 识别信号或缺少识别信号由诸如光笔或视频枪的检测器检测,并且检测器将串行总线上的识别信号发送到显示屏图形控制器,从而向控制器指示屏幕上的位置 检测器是指向的。

    Power management system for a computer
    10.
    发明授权
    Power management system for a computer 失效
    电脑电源管理系统

    公开(公告)号:US5958055A

    公开(公告)日:1999-09-28

    申请号:US717478

    申请日:1996-09-20

    IPC分类号: G06F1/32 G06F11/00

    CPC分类号: G06F1/3209 G06F11/004

    摘要: An off-hook state of a telephone associated with a computer is used in order to disable the power management unit of the computer to prevent premature power shutdown while the telephone is being used. A power-managed computer system includes a bus system, and a central processing unit coupled to the bus system. The central processing unit has a normal power mode and a power saving mode. A telephony interface coupled to the bus system has a port for coupling to a telephone system network. A power management unit is also coupled to the bus system and is responsive to bus system activity and to indicia of telephony interface activity. The power management unit causes the central processing unit to be in a power saving mode when both bus system activity and telephony interface activity are less than a predetermined level of activity. Additionally, the power management unit maintains the central processing unit in a power mode greater than the power saving mode when either the bus system activity or the telephony interface activity is greater than the predetermined level of activity. An off-hook signal is directly sampled from the modem and provided to activity detection logic within the power management unit. Alternatively, modem interface logic interprets any number of signals provided by the modem to deliver an off-hook signal to the power management unit. Alternatively, telephone interface software includes an off-hook identifier that records the off-hook state of the telephone and an enablement/disablement register in the power management unit is either set or reset. System or user activity is also emulated in order to indicate to the power management unit that activity is occurring within the computer.

    摘要翻译: 使用与计算机相关联的电话机的摘机状态,以便禁用计算机的电源管理单元以防止在使用电话时过早停电。 功率管理的计算机系统包括总线系统和耦合到总线系统的中央处理单元。 中央处理单元具有正常功率模式和省电模式。 耦合到总线系统的电话接口具有用于耦合到电话系统网络的端口。 电力管理单元还耦合到总线系统,并响应于总线系统活动和电话接口活动的标记。 当总线系统活动和电话接口活动都小于预定活动水平时,电源管理单元使得中央处理单元处于省电模式。 此外,当总线系统活动或电话接口活动大于预定活动水平时,电力管理单元将中央处理单元维持在大于省电模式的功率模式中。 摘机信号从调制解调器直接采样并提供给电源管理单元内的活动检测逻辑。 或者,调制解调器接口逻辑解释由调制解调器提供的任何数量的信号以将摘机信号传送到电力管理单元。 或者,电话接口软件包括记录电话的摘机状态的摘机标识符,并且电源管理单元中的启用/禁用寄存器被设置或复位。 系统或用户活动也被仿真,以向电力管理单元指示在计算机内发生的活动。