-
公开(公告)号：US07253072B2
公开(公告)日：2007-08-07
申请号：US11006257
申请日：2004-12-07
IPC分类号： H01L21/331
CPC分类号： H01L21/26586 , H01L21/823814 , H01L29/66659
摘要： The present invention provides a method for implanting ions in a substrate and a method for manufacturing an integrated circuit. The method for implanting ions in a substrate, among other steps, including placing a substrate (410) on an implant platen (405) such that a predominant axes (430) of the substrate (410) is rotated about 30 degrees to about 60 degrees or about 120 degrees to about 150 degrees offset from a radial with respect to the implant platen (405), and further wherein the substrate (410) is not tilted. The method further includes implanting ions into the substrate (410), the rotated position of the predominant axes (430) reducing shadowing.
摘要翻译： 本发明提供了一种在衬底中注入离子的方法和用于制造集成电路的方法。 包括将衬底（410）放置在植入台板（405）上以使得衬底（410）的主轴（430）旋转约30度至约60度的方法 或相对于植入台板（405）偏离径向的约120度至约150度，并且其中所述基底（410）不倾斜。 该方法还包括将离子注入到基底（410）中，主轴（430）的旋转位置减少阴影。
-
公开(公告)号：US20070257211A1
公开(公告)日：2007-11-08
申请号：US11772524
申请日：2007-07-02
IPC分类号： H01J37/08
CPC分类号： H01L21/26586 , H01L21/823814 , H01L29/66659
摘要： The present invention provides a method for implanting ions in a substrate and a method for manufacturing an integrated circuit. The method for implanting ions in a substrate, among other steps, including placing a substrate (410) on an implant platen (405) such that a predominant axes (430) of the substrate (410) is rotated about 30 degrees to about 60 degrees or about 120 degrees to about 150 degrees offset from a radial with respect to the implant platen (405), and further wherein the substrate (410) is not tilted. The method further includes implanting ions into the substrate (410), the rotated position of the predominant axes (430) reducing shadowing.
摘要翻译： 本发明提供了一种在衬底中注入离子的方法和用于制造集成电路的方法。 包括将衬底（410）放置在植入台板（405）上以使得衬底（410）的主轴（430）旋转约30度至约60度的方法 或相对于植入台板（405）偏离径向的约120度至约150度，并且其中所述基底（410）不倾斜。 该方法还包括将离子注入到基底（410）中，主轴（430）的旋转位置减少阴影。
-
公开(公告)号：US20050255683A1
公开(公告)日：2005-11-17
申请号：US11006257
申请日：2004-12-07
IPC分类号： H01L21/265 , H01L21/336 , H01L21/425 , H01L21/76 , H01L21/8238
CPC分类号： H01L21/26586 , H01L21/823814 , H01L29/66659
摘要： The present invention provides a method for implanting ions in a substrate and a method for manufacturing an integrated circuit. The method for implanting ions in a substrate, among other steps, including placing a substrate (410) on an implant platen (405) such that a predominant axes (430) of the substrate (410) is rotated about 30 degrees to about 60 degrees or about 120 degrees to about 150 degrees offset from a radial with respect to the implant platen (405), and further wherein the substrate (410) is not tilted. The method further includes implanting ions into the substrate (410), the rotated position of the predominant axes (430) reducing shadowing.
摘要翻译： 本发明提供了一种在衬底中注入离子的方法和用于制造集成电路的方法。 包括将衬底（410）放置在植入台板（405）上以使得衬底（410）的主轴（430）旋转约30度至约60度的方法 或相对于植入台板（405）偏离径向的约120度至约150度，并且其中所述基底（410）不倾斜。 该方法还包括将离子注入到基底（410）中，主轴（430）的旋转位置减少阴影。
-
公开(公告)号：US20050059260A1
公开(公告)日：2005-03-17
申请号：US10810905
申请日：2004-03-26
申请人： Haowen Bu , Brian Hornung , P.R. Chidambaram , Amitabh Jain , Rajesh Khamankar , Nandu Mahalingam , Srinivansan Chakravarthi
发明人： Haowen Bu , Brian Hornung , P.R. Chidambaram , Amitabh Jain , Rajesh Khamankar , Nandu Mahalingam , Srinivansan Chakravarthi
IPC分类号： H01L21/00 , H01L21/265 , H01L21/3205 , H01L21/324 , H01L21/336 , H01L21/44 , H01L21/4763 , H01L21/8238 , H01L21/84 , H01L29/08 , H01L29/76 , H01L29/78
CPC分类号： H01L21/26506 , H01L21/265 , H01L21/26513 , H01L21/2658 , H01L21/3185 , H01L21/324 , H01L21/823814 , H01L21/823864 , H01L29/0847 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7845
摘要： The present invention teaches the formation of CMOS transistors using interfacial nitrogen at the interface between the lightly doped extension regions and an overlying insulating layer in combination with a capping layer of silicon nitride, both prior to the final source/drain anneal. Doses and energies may be increased for the P-channel lightly-doped drain, source and drain regions. The resulting transistors exhibit desirably high drive current and low off-state leakage current and overlap capacitance.
摘要翻译： 本发明教导了在最终的源极/漏极退火之前，在轻掺杂的延伸区域之间的界面处的界面氮和与氮化硅覆盖层结合的上覆绝缘层的CMOS晶体管的形成。 P沟道轻掺杂漏极，源极和漏极区域的剂量和能量可能会增加。 所得到的晶体管显示期望的高驱动电流和低截止状态的漏电流和重叠电容。
-
公开(公告)号：US20060154411A1
公开(公告)日：2006-07-13
申请号：US11372430
申请日：2006-03-09
申请人： Haowen Bu , Brian Hornung , P.R. Chidambaram , Amitabh Jain , Rajesh Khamankar , Nandu Mahalingam , Srinivansan Chakravarthi
发明人： Haowen Bu , Brian Hornung , P.R. Chidambaram , Amitabh Jain , Rajesh Khamankar , Nandu Mahalingam , Srinivansan Chakravarthi
IPC分类号： H01L21/338 , H01L21/31
CPC分类号： H01L21/26506 , H01L21/265 , H01L21/26513 , H01L21/2658 , H01L21/3185 , H01L21/324 , H01L21/823814 , H01L21/823864 , H01L29/0847 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7845
摘要： The present invention teaches the formation of CMOS transistors using interfacial nitrogen at the interface between the lightly doped extension regions and an overlying insulating layer in combination with a capping layer of silicon nitride, both prior to the final source/drain anneal. Doses and energies may be increased for the P-channel lightly-doped drain, source and drain regions. The resulting transistors exhibit desirably high drive current and low off-state leakage current and overlap capacitance.
摘要翻译： 本发明教导了在最终的源极/漏极退火之前，在轻掺杂的延伸区域之间的界面处的界面氮和与氮化硅覆盖层结合的上覆绝缘层的CMOS晶体管的形成。 P沟道轻掺杂漏极，源极和漏极区域的剂量和能量可能会增加。 所得到的晶体管显示期望的高驱动电流和低截止状态的漏电流和重叠电容。
-
-
-
-
搜索结果
5 条记录 (耗时 0.027 秒)
