Barrier layer device processing
    1.
    发明授权
    Barrier layer device processing 失效
    屏障层设备处理

    公开(公告)号:US5198881A

    公开(公告)日:1993-03-30

    申请号:US742274

    申请日:1991-08-07

    IPC分类号: H01L27/148

    CPC分类号: H01L27/14831

    摘要: A surface electron barrier region is formed on a semiconductor membrane device by a single step laser process which produces a sharp doping profile in a surface region above the light penetration depth. Enhanced quantum efficiency is observed, and by selectively forming barrier layers of differing depth, a CCD device architecture for two-color sensitivity is achieved. The barrier layer results in enhanced membrane-type and radiation hardened bipolar and CMOS devices.

    摘要翻译: 在半导体膜器件上通过单步激光工艺形成表面电子势垒区域,其在高于透光深度的表面区域中产生尖锐的掺杂分布。 观察到增强的量子效率,并且通过选择性地形成不同深度的势垒层,实现了用于双色灵敏度的CCD器件结构。 阻挡层导致增强的膜型和辐射硬化的双极和CMOS器件。

    Low capacitance field emission display by gate-cathode dielectric
    2.
    发明授权
    Low capacitance field emission display by gate-cathode dielectric 失效
    通过栅极 - 阴极电介质消除的低电容场发射显示

    公开(公告)号:US5404070A

    公开(公告)日:1995-04-04

    申请号:US130867

    申请日:1993-10-04

    IPC分类号: H01J9/02 H01J29/70

    CPC分类号: H01J9/025 H01J2329/00

    摘要: A method for making a matrix addressed flat panel display using field emission microtips having reduced capacitance and low power consumption, and the resulting display, are described. A dielectric base substrate on which to form the field emission microtips is provided. Cathode columns of parallel spaced conductors are formed upon the substrate. First dielectric supports are formed in and above spaces between the cathode columns. Gate lines for the display are formed of parallel spaced conductors over the supports and perpendicular to the supports and the cathode columns. Second dielectric supports are formed below spaces between the gate lines, on the cathode columns and intersecting with the first supports. Pixels of the display are formed at the intersections of the cathode columns and the gate lines. There are a plurality of openings in the gate lines, at the pixels. A plurality of field emission microtips are formed at each of the pixels, connected to and extending up from the cathode columns and into the plurality of openings.

    摘要翻译: 描述了使用具有降低的电容和低功耗的场发射微尖头以及所得显示器来制造矩阵寻址平板显示器的方法。 提供了形成场致发射微尖端的电介质基底。 平行隔开的导体的阴极柱形成在衬底上。 第一电介质载体形成在阴极柱之间的空间中和上方。 用于显示器的栅极线由支撑件上的平行隔开的导体形成,并垂直于支撑体和阴极柱。 第二电介质载体在阴极列之间的栅极线之间的空间下方形成并且与第一支撑件相交。 显示器的像素形成在阴极柱和栅极线的交点处。 在栅极线中,在像素处存在多个开口。 在每个像素处形成多个场发射微尖端,连接到阴极柱并且从阴极柱向上延伸到多个开口中。

    Fabrication of high aspect ratio spacers for field emission display
    3.
    发明授权
    Fabrication of high aspect ratio spacers for field emission display 失效
    用于场发射显示的高纵横比间隔物的制造

    公开(公告)号:US5509840A

    公开(公告)日:1996-04-23

    申请号:US345942

    申请日:1994-11-28

    IPC分类号: H01J9/18 H01J9/24 H01J31/12

    摘要: A method for fabricating high aspect ratio spacers for a field emission display is described. An array of field emission microtips is formed over a substrate. A layer of lithographic material is formed over the array of field emission microtips. Openings are formed in the layer of lithographic material. The openings may be formed by a plasma etch with oxygen, or by x-ray lithography. A non-outgassing material is formed over the surface of the layer of lithographic material, including in the openings. The openings are filled with a spacer material, the spacer material being a conductive material, an insulator, or, preferably, a combination thereof. Lastly, the layer of lithographic material and the non-outgassing material are removed.

    摘要翻译: 描述了用于制造用于场致发射显示器的高纵横比间隔件的方法。 在衬底上形成场发射微尖端阵列。 在场发射微尖端阵列上形成一层平版印刷材料。 开口形成在平版印刷材料层中。 可以通过用氧等离子体蚀刻或通过x射线光刻形成开口。 包括在开口中的平版印刷材料层的表面上形成非除气材料。 开口填充有间隔物材料,间隔物材料为导电材料,绝缘体,或优选其组合。 最后,去除了平版印刷材料层和非除气材料。

    Method of fabricating high uniformity field emission display
    4.
    发明授权
    Method of fabricating high uniformity field emission display 失效
    制造高均匀性场发射显示的方法

    公开(公告)号:US5461009A

    公开(公告)日:1995-10-24

    申请号:US162954

    申请日:1993-12-08

    IPC分类号: H01J9/02 H01L21/465

    CPC分类号: H01J9/025

    摘要: A microtip structure with high uniformity, low operating voltage and no resistive dissipation for a field emission display is described. A substrate is provided. A first conductive layer is formed on the substrate that acts as a cathode. A second conductive layer with a narrow circular opening acts as a gate. A first dielectric layer separates the cathode and the gate. The microtip extends up from the cathode and into the opening. A second dielectric layer is over the gate, with a circular opening that is larger than and concentric with the narrow circular opening in the gate. A means to provide a brief, charging voltage to the gate, followed by a longer operational voltage, wherein the amplitude of the operational voltage is lower than the amplitude of the charging voltage, is included.

    摘要翻译: 描述了具有高均匀性,低工作电压和用于场发射显示器的电阻耗散的微尖头结构。 提供基板。 在作为阴极的基板上形成第一导电层。 具有窄圆形开口的第二导电层用作栅极。 第一电介质层分离阴极和栅极。 微尖端从阴极向上延伸并进入开口。 第二电介质层在栅极上方,具有大于并与栅极中的窄圆形开口同心的圆形开口。 包括向栅极提供简短的充电电压的手段,随后是较长的工作电压,其中工作电压的幅度低于充电电压的幅度。

    Cold cathode field emission display and method for forming it
    5.
    发明授权
    Cold cathode field emission display and method for forming it 失效
    冷阴极场发射显示及其形成方法

    公开(公告)号:US5578896A

    公开(公告)日:1996-11-26

    申请号:US419435

    申请日:1995-04-10

    申请人: Jammy C. Huang

    发明人: Jammy C. Huang

    IPC分类号: H01J1/304 H01J1/02

    摘要: A cold cathode field emission display is described. A key feature of its design is that each individual microtip has its own ballast resistor. The latter is formed from a resistive layer that has been interposed between the cathode line and the substrate. When openings for the microtips are formed in the gate line, extending down as far as the resistive layer, an overetching step is introduced. This causes the dielectric layer to be substantially undercut immediately above the resistive layer thereby creating an annular resistor positioned between the gate line and the base of the microtip.

    摘要翻译: 描述冷阴极场致发射显示器。 其设计的一个关键特征是每个单独的微尖端都有自己的镇流电阻。 后者由介于阴极线和衬底之间的电阻层形成。 当在栅极线上形成微尖端的开口时,向下延伸到电阻层一侧,引入过蚀刻步骤。 这使得电介质层在电阻层的正上方基本上被切下,从而形成位于微尖端的栅极线和基极之间的环形电阻器。

    Single tip redundancy method with resistive base and resultant flat
panel display
    6.
    发明授权
    Single tip redundancy method with resistive base and resultant flat panel display 失效
    单端冗余方法,具有电阻基底和平面显示屏

    公开(公告)号:US5451830A

    公开(公告)日:1995-09-19

    申请号:US184919

    申请日:1994-01-24

    申请人: Jammy C. Huang

    发明人: Jammy C. Huang

    IPC分类号: H01J1/304 H01J9/02 H01J1/30

    摘要: A high resolution matrix addressed flat panel display having single field emission microtip redundancy with resistive base is described. Parallel, spaced conductors acting as cathode columns for the display are over the substrate. A layer of insulation is formed over the cathode columns. Parallel, spaced conductors acting as gate lines for the display are formed over the layer of insulation at a right angle to the cathode columns. The intersections of the cathode columns and gate lines are pixels of the display. A plurality of openings at the pixels extend through the insulating layer and the gate lines. At each of the openings is a resistive base connected to the cathode conductor column. A small field emission microtip is formed on each resistive base, extending up from the resistive base and into the openings, the height of the microtip being many times smaller than the height of the resistive base.

    摘要翻译: 描述了具有具有电阻基座的单场发射微尖端冗余的高分辨率矩阵寻址的平板显示器。 作为显示器的阴极柱的平行,间隔的导体在衬底上。 在阴极柱上形成绝缘层。 作为显示器的栅极线的平行的隔开的导体以与阴极柱成直角的绝缘层形成。 阴极柱和栅极线的交点是显示器的像素。 像素处的多个开口延伸穿过绝缘层和栅极线。 在每个开口处是连接到阴极导体柱的电阻基座。 在每个电阻基底上形成小的场发射微尖端,从电阻基极向上延伸到开口中,微尖端的高度比电阻基底的高度小很多倍。