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    THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20100019246A1

    公开(公告)日：2010-01-28

    申请号：US12434907

    申请日：2009-05-04

    申请人： Jang-Soo KIM ,  Jae-Hyoung YOUN ,  Sang-Soo KIM ,  Dong-Gyu KIM

    发明人： Jang-Soo KIM ,  Jae-Hyoung YOUN ,  Sang-Soo KIM ,  Dong-Gyu KIM

    IPC分类号： H01L33/00 ,  H01L21/336

    CPC分类号： H01L29/78633 ,  H01L27/124 ,  H01L27/1248

    摘要： A method for manufacturing a thin film transistor array panel includes; forming a gate line including a gate electrode and a height increasing member on a substrate, forming a gate insulating layer on the gate line and the height increasing member, forming a semiconductor, a data line including a source electrode, and a drain electrode facing the source electrode and overlapping at least a portion of the height increasing member on the gate insulating layer, forming a first insulating layer on the gate insulating layer, a data line and the drain electrode, forming a light-blocking member on a portion of the first insulating layer corresponding to the gate line and the data line, forming a color filter in an area bound by the light-blocking member, forming a second insulating layer on the light-blocking member and the color filter, and patterning the second insulating layer, the light-blocking member or the color filter, and the first insulating layer to form a contact hole exposing a portion of the drain electrode aligned with the height increasing member.

    摘要翻译： 薄膜晶体管阵列板的制造方法包括： 在基板上形成包括栅电极和高度增加部件的栅极线，在栅极线和高度增加部件上形成栅绝缘层，形成半导体，包括源电极和漏电极的数据线， 并且在所述栅极绝缘层上与所述高度增加部件的至少一部分重叠，在所述栅极绝缘层上形成第一绝缘层，在所述栅极绝缘层上形成第一绝缘层，在所述栅极绝缘层上形成阻挡部件，在所述第一 对应于栅极线和数据线的绝缘层，在由阻光构件限定的区域中形成滤色器，在遮光构件和滤色器上形成第二绝缘层，并对第二绝缘层进行构图， 遮光构件或滤色器，以及第一绝缘层，以形成暴露与高度增加构件对准的漏电极的一部分的接触孔。

    ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 失效
    阵列基板及其制造方法

    公开(公告)号：US20090166635A1

    公开(公告)日：2009-07-02

    申请号：US12273661

    申请日：2008-11-19

    申请人： Jang-Soo KIM ,  Jae-Hyoung YOUN

    发明人： Jang-Soo KIM ,  Jae-Hyoung YOUN

    IPC分类号： H01L29/06 ,  H01L21/02

    CPC分类号： H01L27/1218 ,  H01L27/124 ,  H01L27/1248

    摘要： An array substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (“TFT”) and a pixel electrode. The gate line includes a gate covering line formed in a first direction on the base substrate and a gate main line protruded from the gate covering line. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is formed on the gate insulation layer in a second direction crossing the first direction. The TFT is electrically connected to the gate line and the data line. The pixel electrode is electrically connected to the TFT. Therefore, a gate line is thicker than a gate covering line and a gate main line having a low resistance is further formed, so that a gate signal may be quickly transferred along the gate line without a signal delay.

    摘要翻译： 阵列基板包括基底基板，栅极线，栅极绝缘层，数据线，薄膜晶体管（“TFT”）和像素电极。 栅极线包括在基底基板上沿第一方向形成的栅极覆盖线和从栅极覆盖线突出的栅极主线。 栅极绝缘层形成在基底基板上以覆盖栅极线。 数据线沿与第一方向交叉的第二方向形成在栅极绝缘层上。 TFT与栅极线和数据线电连接。 像素电极电连接到TFT。 因此，栅极线比栅极覆盖线厚，并且进一步形成具有低电阻的栅极主线，使得栅极信号可以沿着栅极线快速传输而没有信号延迟。

    THIN FILM TRANSISTOR SUBSTRATE AND A FABRICATING METHOD THEREOF
    4.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND A FABRICATING METHOD THEREOF 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20100032664A1

    公开(公告)日：2010-02-11

    申请号：US12502653

    申请日：2009-07-14

    申请人： Young-Wook LEE ,  Hong-Suk YOO ,  Jean-Ho SONG ,  Jae-Hyoung YOUN ,  Jong-In KIM

    发明人： Young-Wook LEE ,  Hong-Suk YOO ,  Jean-Ho SONG ,  Jae-Hyoung YOUN ,  Jong-In KIM

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/1225

    摘要： An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.

    摘要翻译： 氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极，邻近栅电极设置的氧化物半导体图案，与栅极线电绝缘的数据线，数据线和限定线 显示区域，暴露数据线的表面的第一开口，暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘，漏电极从第一开口延伸 到第二开口并电连接漏电极焊盘和氧化物半导体图案。

    THIN FILM TRANSISTOR ARRAY PANEL
    6.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号：US20090302316A1

    公开(公告)日：2009-12-10

    申请号：US12464920

    申请日：2009-05-13

    申请人： Woo-Geun LEE ,  Jae-Hyoung YOUN ,  Ki-Won KIM ,  Young-Wook LEE ,  Jong-In KIM

    发明人： Woo-Geun LEE ,  Jae-Hyoung YOUN ,  Ki-Won KIM ,  Young-Wook LEE ,  Jong-In KIM

    IPC分类号： H01L29/786

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/78696

    摘要： A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.

    摘要翻译： 薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，包括栅极电极，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上并包括薄膜晶体管的沟道的半导体 ，形成在半导体上的数据线，包括相对于薄膜晶体管的沟道形成在半导体上并与源电极相对的源电极和漏电极，其中薄膜晶体管的沟道覆盖两个侧表面 的栅电极。