公开(公告)号：US09153600B2

公开(公告)日：2015-10-06

申请号：US13618308

申请日：2012-09-14

申请人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

发明人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。

公开(公告)号：US08604478B2

公开(公告)日：2013-12-10

申请号：US13168769

申请日：2011-06-24

申请人： Hye-Young Ryu ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Hye-Young Ryu ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： H01L29/04

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/3258

摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

摘要翻译： 在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。 半导体层设置在栅极绝缘层上。 源极电极与与栅极线相交的数据线电连接。 漏电极面对源电极并限定半导体层的沟道面积。 有机层设置在数据线上，并且具有暴露通道区域的第一开口。 无机绝缘层设置在有机层上。 像素电极设置在无机绝缘层上并与漏电极电连接。 无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

公开(公告)号：US20130214299A1

公开(公告)日：2013-08-22

申请号：US13618308

申请日：2012-09-14

申请人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

发明人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。

公开(公告)号：US08426228B2

公开(公告)日：2013-04-23

申请号：US13181403

申请日：2011-07-12

申请人： Hye-Young Ryu ,  Hyang-Shik Kong ,  Byung-Duk Yang ,  Kyung-Sook Jeon

发明人： Hye-Young Ryu ,  Hyang-Shik Kong ,  Byung-Duk Yang ,  Kyung-Sook Jeon

IPC分类号： H01L29/06 ,  H01L29/08

CPC分类号： G02F1/1362 ,  G02F1/133514 ,  G02F2001/1316 ,  G02F2001/136222 ,  H01L27/124

摘要： Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.

摘要翻译： 通过用无机绝缘层密封滤色器层，从而阻挡了设置在薄膜晶体管（TFT）支撑基板上的滤色器层的材料。 在批量生产制造期间，在沉积滤色器层之后但在沉积无机绝缘层之前采用等离子体表面清洁步骤。 使用低温CVD工艺将无机绝缘层的厚度基本上均匀地沉积在滤色器层上，包括顺应地包括通过滤色器层提供的开口。

公开(公告)号：US08216865B2

公开(公告)日：2012-07-10

申请号：US12772836

申请日：2010-05-03

申请人： Young-Joo Choi ,  Woo-Geun Lee ,  Hye-Young Ryu ,  Ki-Won Kim

发明人： Young-Joo Choi ,  Woo-Geun Lee ,  Hye-Young Ryu ,  Ki-Won Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  C23F1/02 ,  C23F1/18 ,  C23F1/26 ,  H01L21/32134 ,  H01L21/465 ,  H01L27/1225

摘要： A display device includes a gate pattern, a semiconductor pattern, a source pattern and a pixel electrode are provided. The gate pattern is formed on a base substrate and includes a gate line and a gate electrode. The semiconductor pattern is formed on the base substrate having the gate pattern and includes an oxide semiconductor. The source pattern is formed from a data metal layer and formed on the base substrate having the semiconductor pattern, and includes a data line, a source electrode and a drain electrode. The data metal layer includes a first copper alloy layer, and a lower surface of the data metal layer substantially coincides with an upper surface of the semiconductor pattern. The pixel electrode is formed on the base substrate having the source pattern and electrically connected to the drain electrode. Thus, manufacturing processes may be simplified, and reliability may be improved.

摘要翻译： 显示装置包括栅极图案，半导体图案，源图案和像素电极。 栅极图案形成在基底基板上，并且包括栅极线和栅电极。 半导体图案形成在具有栅极图案的基底基板上，并且包括氧化物半导体。 源图案由数据金属层形成并形成在具有半导体图案的基底基板上，并且包括数据线，源电极和漏电极。 数据金属层包括第一铜合金层，数据金属层的下表面基本上与半导体图案的上表面重合。 像素电极形成在具有源极图案的基底基板上并与漏电极电连接。 因此，可以简化制造工艺，并且可以提高可靠性。

公开(公告)号：US20110269254A1

公开(公告)日：2011-11-03

申请号：US13181403

申请日：2011-07-12

申请人： Hye-Young Ryu ,  Hyang-Shik Kong ,  Byung-Duk Yang ,  Kyung-Sook Jeon

发明人： Hye-Young Ryu ,  Hyang-Shik Kong ,  Byung-Duk Yang ,  Kyung-Sook Jeon

IPC分类号： H01L33/08

CPC分类号： G02F1/1362 ,  G02F1/133514 ,  G02F2001/1316 ,  G02F2001/136222 ,  H01L27/124

摘要： Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.

摘要翻译： 通过用无机绝缘层密封滤色器层，从而阻挡了设置在薄膜晶体管（TFT）支撑基板上的滤色器层的材料。 在批量生产制造期间，在沉积滤色器层之后但在沉积无机绝缘层之前采用等离子体表面清洁步骤。 使用低温CVD工艺将无机绝缘层的厚度基本上均匀地沉积在滤色器层上，包括顺应地包括通过滤色器层提供的开口。

公开(公告)号：US20110254007A1

公开(公告)日：2011-10-20

申请号：US13168769

申请日：2011-06-24

申请人： Hye-Young RYU ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Hye-Young RYU ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： H01L33/08

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/3258

摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

摘要翻译： 在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。 半导体层设置在栅极绝缘层上。 源极电极与与栅极线相交的数据线电连接。 漏电极面对源电极并限定半导体层的沟道面积。 有机层设置在数据线上，并且具有暴露通道区域的第一开口。 无机绝缘层设置在有机层上。 像素电极设置在无机绝缘层上并与漏电极电连接。 无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

公开(公告)号：US08013945B2

公开(公告)日：2011-09-06

申请号：US12005904

申请日：2007-12-27

申请人： Kyoung-Ju Shin ,  Shi-Yul Kim ,  Hye-Young Ryu ,  Mee-Hye Jung ,  Jang-Soo Kim ,  Su-Hyoung Kang

发明人： Kyoung-Ju Shin ,  Shi-Yul Kim ,  Hye-Young Ryu ,  Mee-Hye Jung ,  Jang-Soo Kim ,  Su-Hyoung Kang

IPC分类号： G02F1/1343 ,  H01L29/04

CPC分类号： G02F1/136209 ,  G02F1/133512 ,  G02F1/133707 ,  G02F1/136286 ,  G02F2001/136222

摘要： A display substrate includes a gate line, a gate insulating layer, a data line, a thin-film transistor (TFT), a storage line, a passivation layer, a color filter layer, a pixel electrode, a first light-blocking layer and a second light-blocking layer. The storage line includes the same material as the gate line. The passivation layer covers the data line. The color filter layer is formed on the passivation layer. The pixel electrode is formed on the color filter layer in each pixel. The first light-blocking layer is formed between adjacent pixel electrodes, and includes the same material as the gate line. The second light-blocking layer is formed between the first light-blocking layer, and includes the same material as the data line. Therefore, an aperture ratio may be increased.

摘要翻译： 显示基板包括栅极线，栅极绝缘层，数据线，薄膜晶体管（TFT），存储线，钝化层，滤色器层，像素电极，第一遮光层和 第二遮光层。 存储线包括与栅极线相同的材料。 钝化层覆盖数据线。 滤色层在钝化层上形成。 像素电极形成在每个像素中的滤色器层上。 第一遮光层形成在相邻的像素电极之间，并且包括与栅极线相同的材料。 第二遮光层形成在第一遮光层之间，并且包括与数据线相同的材料。 因此，可以增加开口率。

公开(公告)号：US20110193076A1

公开(公告)日：2011-08-11

申请号：US12957743

申请日：2010-12-01

申请人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

发明人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

摘要翻译： 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US07948594B2

公开(公告)日：2011-05-24

申请号：US12101079

申请日：2008-04-10

申请人： Hye-Young Ryu

发明人： Hye-Young Ryu

IPC分类号： G02F1/1343 ,  G02F1/13

CPC分类号： G02F1/1333 ,  G02F2001/133354 ,  G02F2001/133388 ,  G02F2001/136222 ,  G02F2001/136231

摘要： A display substrate includes a transparent insulating substrate, a transparent common electrode, a dummy pattern and a key pattern. The transparent insulating substrate has a display area and a non-display area. Images are displayed in the display area, and the non-display area surrounds the display area. The transparent common electrode is formed in the display area of the insulating substrate. The dummy pattern is formed in the non-display area of the insulating substrate. The dummy pattern is formed from the same material as the common electrode. The key pattern is formed on the dummy pattern. The key pattern may include a metal or an opaque photoresist. Therefore, a process of manufacturing the display substrate may be simplified.

摘要翻译： 显示基板包括透明绝缘基板，透明公共电极，虚设图案和键图案。 透明绝缘基板具有显示区域和非显示区域。 图像显示在显示区域中，非显示区域围绕显示区域。 透明公共电极形成在绝缘基板的显示区域中。 虚设图案形成在绝缘基板的非显示区域中。 虚设图案由与公共电极相同的材料形成。 键图案形成在虚拟图案上。 键图案可以包括金属或不透明光致抗蚀剂。 因此，可以简化显示基板的制造工艺。