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公开(公告)号:US20230284509A1
公开(公告)日:2023-09-07
申请号:US18175549
申请日:2023-02-28
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Fumiya KIMURA , Hiroshi OGAWA
CPC classification number: H10K59/80524 , H10K59/871 , H10K71/231 , H10K2102/103
Abstract: According to one embodiment, a display device manufacturing method comprises forming a lower electrode including a first metal layer and a conductive oxide layer which covers the first metal layer and which has a thickness of 15 nm or more and 50 nm or less, forming a rib covering at least a part of the lower electrode and including a pixel aperture which exposes the conductive oxide layer, forming a second metal layer above the rib and the conductive oxide layer exposed through the pixel aperture, and patterning the second metal layer by etching including wet etching to form a partition on the rib.
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公开(公告)号:US20240142836A1
公开(公告)日:2024-05-02
申请号:US18407505
申请日:2024-01-09
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Fumiya KIMURA , Kazuhide MOCHIZUKI , Hitoshi TANAKA , Kenichi AKUTSU , Atsuko SHIMADA
IPC: G02F1/1362 , G02F1/1368
CPC classification number: G02F1/136286 , G02F1/136227 , G02F1/1368 , G02F1/134363
Abstract: According to one embodiment, a display device includes a semiconductor layer, a first insulating layer, a gate electrode, a second insulating layer and a plurality of transparent conductive layers. The transparent conductive layers include a pixel electrode, a first conductive layer and a second conductive layer. The pixel electrode is in contact with the second conductive layer. The second conductive layer is in contact with the first conductive layer. The first conductive layer is brought into contact with a second region of the semiconductor layer through a first contact hole.
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公开(公告)号:US20210109412A1
公开(公告)日:2021-04-15
申请号:US17066493
申请日:2020-10-09
Applicant: Japan Display Inc.,
Inventor: Isao SUZUMURA , Fumiya KIMURA , Kazuhide MOCHIZUKI , Hitoshi TANAKA , Kenichi AKUTSU , Atsuko SHIMADA
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368
Abstract: According to one embodiment, a display device includes a semiconductor layer, a first insulating layer, a gate electrode, a second insulating layer and a plurality of transparent conductive layers. The transparent conductive layers include a pixel electrode, a first conductive layer and a second conductive layer. The pixel electrode is in contact with the second conductive layer. The second conductive layer is in contact with the first conductive layer. The first conductive layer is brought into contact with a second region of the semiconductor layer through a first contact hole.
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公开(公告)号:US20220326581A1
公开(公告)日:2022-10-13
申请号:US17851982
申请日:2022-06-28
Applicant: Japan Display Inc.
Inventor: Fumiya KIMURA , Isao SUZUMURA
IPC: G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1339
Abstract: The purpose of the present invention is to obviate patterning defects of electrodes in through-holes formed in an organic passivation film for connection between TFTs and pixel electrodes in an ultra-high definition display device. To achieve the foregoing, the present invention has a configuration such as the following. This display device, in which a TFT (thin-film transistor) is formed on a substrate, an organic passivation film is formed covering the TFT, and a first pixel electrode, a first common electrode, a second pixel electrode, and a second common electrode are formed on the organic passivation film, is characterized in that the first pixel electrode is connected to the TFT via a through-hole formed in the organic passivation film, the through-hole is filled with a filler, and an end of the second pixel electrode is present on the upper side of the filler.
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公开(公告)号:US20210257402A1
公开(公告)日:2021-08-19
申请号:US17167081
申请日:2021-02-04
Applicant: Japan Display Inc.
Inventor: Hajime WATAKABE , Akihiro HANADA , Marina MOCHIZUKI , Ryo ONODERA , Fumiya KIMURA , Isao SUZUMURA
IPC: H01L27/146
Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.
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公开(公告)号:US20230280623A1
公开(公告)日:2023-09-07
申请号:US18196312
申请日:2023-05-11
Applicant: Japan Display Inc.
Inventor: Fumiya KIMURA , Isao SUZUMURA
IPC: G02F1/1362 , G02F1/1339 , G02F1/1343 , G02F1/1368
CPC classification number: G02F1/136227 , G02F1/13394 , G02F1/13439 , G02F1/136213 , G02F1/1368 , G02F1/13306
Abstract: A display device is provided and includes a substrate on which a TFT is formed. The display device including an organic film formed on the TFT, the organic film having a through hole, and a first common electrode, an upper pixel electrode and a second common electrode which are stacked in this order above the organic passivation film, a filler being filled in the through hole, and wherein the upper pixel electrode is electrically connected with the TFT, and an edge of the upper pixel electrode is located directly on the filler.
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公开(公告)号:US20230205023A1
公开(公告)日:2023-06-29
申请号:US18085595
申请日:2022-12-21
Applicant: Japan Display Inc.
Inventor: Fumiya KIMURA , Isao SUZUMURA
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
CPC classification number: G02F1/136222 , G02F1/136286 , G02F1/133345 , G02F1/136227 , G02F1/134345
Abstract: According to one embodiment, a display device includes a signal line, a scanning line, a semiconductor layer, a first insulating layer which covers the semiconductor layer, a color filter above the first insulating layer, a pixel electrode above the color filter and a common electrode. The first insulating layer includes a first contact hole for connecting the semiconductor layer and the pixel electrode to each other. The first contact hole is provided at a position displaced from the color filter in plan view.
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公开(公告)号:US20220376076A1
公开(公告)日:2022-11-24
申请号:US17745953
申请日:2022-05-17
Applicant: Japan Display Inc.
Inventor: Toshiki KANEKO , Fumiya KIMURA
Abstract: A semiconductor device includes a substrate, an oxide semiconductor layer over the substrate, a gate insulating layer over the oxide semiconductor layer, a metal oxide layer over the gate insulating layer, and a gate electrode over the metal oxide layer. A first side surface of the metal oxide protrudes from a second side surface of the gate electrode in a plan view.
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公开(公告)号:US20240272496A1
公开(公告)日:2024-08-15
申请号:US18637685
申请日:2024-04-17
Applicant: Japan Display Inc.
Inventor: Fumiya KIMURA , Isao SUZUMURA
IPC: G02F1/1362 , G02F1/133 , G02F1/1333 , G02F1/1335 , G02F1/1339 , G02F1/1343 , G02F1/1368 , G03F7/00
CPC classification number: G02F1/136227 , G02F1/13394 , G02F1/13439 , G02F1/136213 , G02F1/1368 , G02F1/13306 , G02F1/133345 , G02F1/133514 , G03F7/0007
Abstract: A display device is provided and includes a substrate on which a TFT is formed. The display device including an organic film formed on the TFT, the organic film having a through hole, and a first common electrode, an upper pixel electrode and a second common electrode which are stacked in this order above the organic passivation film, a filler being filled in the through hole, and wherein the upper pixel electrode is electrically connected with the TFT, and an edge of the upper pixel electrode is located directly on the filler.
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公开(公告)号:US20240088192A1
公开(公告)日:2024-03-14
申请号:US18515288
申请日:2023-11-21
Applicant: Japan Display Inc.
Inventor: Hajime WATAKABE , Akihiro HANADA , Marina MOCHIZUKI , Ryo ONODERA , Fumiya KIMURA , Isao SUZUMURA
IPC: H01L27/146
CPC classification number: H01L27/14643 , H01L27/1461 , H01L27/14636 , H01L27/14689
Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.
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