公开(公告)号：US07176704B2

公开(公告)日：2007-02-13

申请号：US10823546

申请日：2004-04-14

申请人： Je-hyoung Ryu ,  Tae-gyu Kim ,  Soon-kyu Yim ,  Sung-jin Lee ,  Jun-ho Lee

发明人： Je-hyoung Ryu ,  Tae-gyu Kim ,  Soon-kyu Yim ,  Sung-jin Lee ,  Jun-ho Lee

IPC分类号： G01R31/02

CPC分类号： G01R1/0458

摘要： An inspecting apparatus for semiconductor devices including: a match plate; a contact module combined with the match plate, and the match plate including a radiation unit radiating heat from the semiconductor devices to the outside, and a test unit contacting leads of the semiconductor; an insert module installed on a bottom of the contact module, and having a semiconductor device accommodator to accommodate the semiconductor device; and an auxiliary radiation member installed on a bottom of the insert module, and radiating the heat from the semiconductor device to the outside. Accordingly, the inspecting apparatus for semiconductor device according to the present invention performs testing at a constant temperature regardless of heat from the semiconductors by radiating the heat from the semiconductors immediately and efficiently, thereby producing more accurate test results. Accurate testing improves productivity and saves expense by removing faulty test results caused by identifying a qualified semiconductor as a defective semiconductor due to heat radiated from the semiconductor device.

摘要翻译： 一种用于半导体器件的检查装置，包括：匹配板; 与所述匹配板组合的接触模块，所述匹配板包括从所述半导体器件向外部辐射热的辐射单元，以及接触所述半导体的引线的测试单元; 插入模块，安装在所述触点模块的底部，并且具有用于容纳所述半导体器件的半导体器件容纳器; 以及安装在所述插入模块的底部上的辅助辐射构件，并且将来自所述半导体器件的热量散发到外部。 因此，根据本发明的半导体装置的检查装置不管来自半导体的热量是恒定的，通过立即有效地辐射来自半导体的热量进行测试，从而产生更准确的测试结果。 通过从半导体器件辐射的热量，通过识别合格的半导体作为有缺陷的半导体而导致的故障测试结果，可以提高生产率并节省成本。

公开(公告)号：US07034557B2

公开(公告)日：2006-04-25

申请号：US10820748

申请日：2004-04-09

申请人： Je-hyoung Ryu ,  Tae-gyu Kim ,  Jun-ho Lee ,  Sung-jin Lee ,  Hong-yong Lee

发明人： Je-hyoung Ryu ,  Tae-gyu Kim ,  Jun-ho Lee ,  Sung-jin Lee ,  Hong-yong Lee

IPC分类号： G01R31/26

CPC分类号： G01R1/0458

摘要： An inspecting apparatus for a semiconductor device includes a match plate; a contact module combined with the match plate and including a radiator to radiate heat from the semiconductor device to the outside and a tester to contact the leads of the semiconductor device; and a heat pipe provided in the radiator. The inspecting apparatus performs testing at a constant temperature, regardless of heat from the semiconductor device, by transferring the heat quickly and efficiently, thereby producing more accurate test results. The apparatus also improves productivity and saves expense by removing faulty test results caused by incorrectly identifying a qualified semiconductor device as a defective semiconductor device.

摘要翻译： 半导体装置的检查装置包括：匹配板; 与所述匹配板结合的接触模块，并且包括散热器以将热量从所述半导体器件辐射到外部;以及测试器，以接触所述半导体器件的引线; 以及设置在散热器中的热管。 检查装置通过快速有效地传递热量而与来自半导体装置的热量恒定地进行测试，从而产生更准确的测试结果。 该装置还通过消除由于将合格的半导体器件错误地识别为有缺陷的半导体器件而引起的故障测试结果，从而提高了生产率并节约了费用。

公开(公告)号：US07283931B2

公开(公告)日：2007-10-16

申请号：US10820747

申请日：2004-04-09

申请人： Je-hyoung Ryu ,  Sung-jin Lee ,  Jun-ho Lee ,  Tae-gyu Kim

发明人： Je-hyoung Ryu ,  Sung-jin Lee ,  Jun-ho Lee ,  Tae-gyu Kim

IPC分类号： G06F11/30 ,  G21C17/00 ,  G01R31/00 ,  G01R31/14

CPC分类号： G01R31/2877

摘要： An inspecting apparatus for a semiconductor device having a match plate; a contact module combined with the match plate, including a radiation unit contacting a semiconductor device, and a test unit pressing leads of the semiconductor device; and a thermally conductive pad installed on a contacting face of the radiation unit of the contact module, to transfer heat from the semiconductor device to the radiation unit of the contact module. The present invention provides an inspecting apparatus for semiconductor devices that improves reliability of testing for durability of semiconductor devices against heat, and minimizes damage to the semiconductor devices during testing.

摘要翻译： 一种具有匹配板的半导体器件的检查装置; 与所述匹配板组合的接触模块，包括接触半导体器件的辐射单元和所述半导体器件的压接引线的测试单元; 以及安装在接触模块的辐射单元的接触面上的导热焊盘，以将热量从半导体器件传递到接触模块的辐射单元。 本发明提供一种用于半导体器件的检查装置，其提高半导体器件耐热耐久性的测试的可靠性，并且在测试期间最小化对半导体器件的损坏。

公开(公告)号：US20120007179A1

公开(公告)日：2012-01-12

申请号：US12947763

申请日：2010-11-16

申请人： Yon-sup Pang ,  Jun-ho Lee

发明人： Yon-sup Pang ,  Jun-ho Lee

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1087 ,  H01L29/66659 ,  H01L29/7835

摘要： A high voltage/power semiconductor device using a low voltage logic well is provided. The semiconductor device includes a substrate, a first well region formed by being doped in a first location on a surface of the substrate, a second well region formed by being doped with impurity different from the first well region's in a second location on a surface of the substrate, an overlapping region between the first well region and the second well region where the first well region and the second well region substantially coexist, a gate insulating layer formed on the surface of the first and the second well regions and the surface of the overlapping region, a gate electrode formed on the gate insulating layer, a source region formed on an upper portion of the first well region, and a drain region formed on an upper portion of the second well region. The semiconductor device may also include a separating unit, which is formed in the second well region on the drain side and may be formed as a shallow trench isolation (STI) region having a lower depth than the second well region.

摘要翻译： 提供了使用低电压逻辑井的高压/功率半导体器件。 半导体器件包括衬底，通过在衬底的表面上的第一位置掺杂形成的第一阱区，通过在第二位置上掺杂与第一阱区不同的杂质形成的第二阱区， 所述基板，所述第一阱区域和所述第一阱区域和所述第二阱区域基本共存的所述第二阱区域之间的重叠区域，形成在所述第一阱区域和所述第二阱区域的表面上的栅极绝缘层， 重叠区域，形成在栅极绝缘层上的栅极电极，形成在第一阱区域的上部的源极区域和形成在第二阱区域的上部的漏极区域。 半导体器件还可以包括分离单元，其形成在漏极侧的第二阱区域中，并且可以形成为具有比第二阱区域更深的深度的浅沟槽隔离（STI）区域。

公开(公告)号：US07871906B2

公开(公告)日：2011-01-18

申请号：US12654396

申请日：2009-12-18

申请人： Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

发明人： Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

IPC分类号： H01L21/20

CPC分类号： H01L45/144 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1666

摘要： In various embodiments, the present disclosure may provide a storage node. In various implementations, the storage node may include a bottom electrode having a non-planar bottom surface that conforms with and is connected to a non-planar top surface of a diode electrode of a memory device. The storage node may further include a phase change layer on top of a bottom diode and a top electrode on a top surface of a phase change layer.

摘要翻译： 在各种实施例中，本公开可以提供存储节点。 在各种实施方式中，存储节点可以包括底部电极，其具有与存储器件的二极管电极的非平面顶表面一致并连接到非平面底表面的底部电极。 存储节点还可以在底二极管的顶部和相变层的顶表面上的顶电极之间包括相变层。

公开(公告)号：US07783236B2

公开(公告)日：2010-08-24

申请号：US11964981

申请日：2007-12-27

申请人： Jun-ho Lee ,  Dong-hoon Park

发明人： Jun-ho Lee ,  Dong-hoon Park

IPC分类号： G03G15/08

CPC分类号： G03G15/0887 ,  G03G15/0877 ,  G03G2215/0841

摘要： A developing unit includes a developer feeding unit which feeds developer to an image receptor, a casing which supports the developer feeding unit and includes a developer storing part provided in an area to face the developer feeding unit and to store the developer, and a developer feeding plate which is formed with a developer flowing hole through which the developer flows, and is provided to move between the developer storing part and the developer feeding unit.

摘要翻译： 显影单元包括将显影剂供给到图像接收器的显影剂供给单元，支撑显影剂供给单元的壳体，并且包括设置在面向显影剂供给单元的区域中并且存储显影剂的显影剂储存部分，以及显影剂供给 板形成有显影剂流动孔，显影剂流过该显影剂流动孔，并被设置成在显影剂储存部分和显影剂供给单元之间移动。

公开(公告)号：US20080112443A1

公开(公告)日：2008-05-15

申请号：US11907473

申请日：2007-10-12

申请人： Jun-ho Lee ,  Sang-moon Lee

发明人： Jun-ho Lee ,  Sang-moon Lee

IPC分类号： H01S5/183

CPC分类号： H01S5/14 ,  H01S3/109 ,  H01S5/0207 ,  H01S5/024 ,  H01S5/041 ,  H01S5/18355 ,  H01S5/18358 ,  H01S5/18369

摘要： Provided is a Vertical External Cavity Surface Emitting Laser (VECSEL). The VECSEL includes a semiconductor chip, a pump laser, a narrow bandwidth polarization filter, an external mirror, and a Second Harmonic Generation (SHG) element. The semiconductor chip includes an active layer generating light having a wavelength and a reflective layer reflecting the light generated in the active layer. The pump laser emits a pump beam for exciting the active layer. The narrow bandwidth polarization filter is formed on the semiconductor chip and polarizes the light. The external mirror faces the active layer, amplifies the light emitted from the active layer by repeatedly reflecting the light toward the reflective layer, and outputs the amplified light out of the VECSEL. The SHG element is disposed between the narrow bandwidth polarization filter and the external mirror and converts the wavelength of the light.

摘要翻译： 提供垂直外腔表面发射激光（VECSEL）。 VECSEL包括半导体芯片，泵浦激光器，窄带偏振滤波器，外部反射镜和第二谐波发生（SHG）元件。 半导体芯片包括产生具有波长的光的有源层和反射在有源层中产生的光的反射层。 泵激光器发射用于激发有源层的泵浦光束。 窄带偏振滤波器形成在半导体芯片上并使光线偏振。 外部反射镜面向有源层，通过反射反射层向反射层反射来放大从有源层发射的光，并将放大的光输出VECSEL。 SHG元件设置在窄带偏振滤光器和外反射镜之间，并转换光的波长。

公开(公告)号：US08674442B2

公开(公告)日：2014-03-18

申请号：US12947763

申请日：2010-11-16

申请人： Yon-sup Pang ,  Jun-ho Lee

发明人： Yon-sup Pang ,  Jun-ho Lee

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1087 ,  H01L29/66659 ,  H01L29/7835

摘要： A high voltage/power semiconductor device using a low voltage logic well is provided. The semiconductor device includes a substrate, a first well region formed by being doped in a first location on a surface of the substrate, a second well region formed by being doped with impurity different from the first well region's in a second location on a surface of the substrate, an overlapping region between the first well region and the second well region where the first well region and the second well region substantially coexist, a gate insulating layer formed on the surface of the first and the second well regions and the surface of the overlapping region, a gate electrode formed on the gate insulating layer, a source region formed on an upper portion of the first well region, and a drain region formed on an upper portion of the second well region. The semiconductor device may also include a separating unit, which is formed in the second well region on the drain side and may be formed as a shallow trench isolation (STI) region having a lower depth than the second well region.

摘要翻译： 提供了使用低电压逻辑井的高压/功率半导体器件。 半导体器件包括衬底，通过在衬底的表面上的第一位置掺杂形成的第一阱区，通过在第二位置上掺杂与第一阱区不同的杂质形成的第二阱区， 所述基板，所述第一阱区域和所述第一阱区域和所述第二阱区域基本共存的所述第二阱区域之间的重叠区域，形成在所述第一阱区域和所述第二阱区域的表面上的栅极绝缘层， 重叠区域，形成在栅极绝缘层上的栅极电极，形成在第一阱区域的上部的源极区域和形成在第二阱区域的上部的漏极区域。 半导体器件还可以包括分离单元，其形成在漏极侧的第二阱区域中，并且可以形成为具有比第二阱区域更深的深度的浅沟槽隔离（STI）区域。

公开(公告)号：US20080210922A1

公开(公告)日：2008-09-04

申请号：US12000829

申请日：2007-12-18

申请人： Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

发明人： Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

IPC分类号： H01L47/00 ,  H01L21/28 ,  G11C11/00

CPC分类号： H01L45/144 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1666

摘要： In various embodiments, the present disclosure may provide a storage node. In various implementations, the storage node may include a bottom electrode having a non-planar bottom surface that conforms with and is connected to a non-planar top surface of a diode electrode of a memory device. The storage node may further include a phase change layer on top of a bottom diode and a top electrode on a top surface of a phase change layer.

摘要翻译： 在各种实施例中，本公开可以提供存储节点。 在各种实施方式中，存储节点可以包括底部电极，其具有与存储器件的二极管电极的非平面顶表面一致并连接到非平面底表面的底部电极。 存储节点还可以在底二极管的顶部和相变层的顶表面上的顶电极之间包括相变层。

公开(公告)号：US20080158940A1

公开(公告)日：2008-07-03

申请号：US11980357

申请日：2007-10-31

申请人： Dong-seok Suh ,  Jun-ho Lee

发明人： Dong-seok Suh ,  Jun-ho Lee

IPC分类号： G11C11/00 ,  H01L45/00

CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C13/02 ,  G11C2013/0073 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/144 ,  Y10S977/754

摘要： Provided are a non-volatile memory device and a method of operating the non-volatile memory device. The non-volatile memory device includes a switching device and a storage node connected to the switching device, wherein the storage node comprises: a first electrode connected to the switching device; a chalcogenide material layer formed on the first electrode; and a second electrode formed on the chalcogenide material layer, and one of the first and second electrodes comprises an electrode contact layer formed adjacent to a limited region of the chalcogenide material layer, and a property of the electrode region adjacent to the chalcogenide material layer is changed reversibly according to the direction in which a current is applied, thereby changing between a high resistance state and a low resistance state.

摘要翻译： 提供了非易失性存储器件和操作非易失性存储器件的方法。 所述非易失性存储器件包括连接到所述开关器件的开关器件和存储节点，其中所述存储节点包括：连接到所述开关器件的第一电极; 形成在第一电极上的硫族化物材料层; 和形成在硫族化物材料层上的第二电极，第一和第二电极中的一个电极包括与硫族化物材料层的有限区域相邻形成的电极接触层，与硫族化物材料层相邻的电极区域的性质是 根据施加电流的方向可逆地改变，从而在高电阻状态和低电阻状态之间变化。