公开(公告)号：US20150348982A1

公开(公告)日：2015-12-03

申请号：US14819841

申请日：2015-08-06

申请人： Jeeyong Kim ,  Woonkyung LEE ,  Sunggil KIM ,  Jin-Kyu KANG ,  Jung-Hwan LEE ,  Bonyoung KOO ,  Kihyun HWANG ,  Byoungsun JU ,  Jintae NOH

发明人： Jeeyong Kim ,  Woonkyung LEE ,  Sunggil KIM ,  Jin-Kyu KANG ,  Jung-Hwan LEE ,  Bonyoung KOO ,  Kihyun HWANG ,  Byoungsun JU ,  Jintae NOH

IPC分类号： H01L27/115 ,  H01L29/78 ,  H01L23/535

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

公开(公告)号：US20160336450A1

公开(公告)日：2016-11-17

申请号：US15093892

申请日：2016-04-08

申请人： Yong-Suk TAK ,  Jongryeol YOO ,  Hyun Jung LEE ,  Miseon PARK ,  Bonyoung KOO ,  Sunjung KIM

发明人： Yong-Suk TAK ,  Jongryeol YOO ,  Hyun Jung LEE ,  Miseon PARK ,  Bonyoung KOO ,  Sunjung KIM

IPC分类号： H01L29/78 ,  H01L29/08

CPC分类号： H01L29/7851 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7849

摘要： A semiconductor device includes a fin structure on a substrate and extending in a first direction, a gate electrode crossing over the fin structure, source/drain regions on the fin structure at opposite sides of the gate electrode, and a barrier layer between the fin structure and each of the source/drain regions. The fin structure includes a material having a lattice constant different from that of the substrate, the fin structure, the source/drain regions, and the barrier layer include germanium, and a germanium concentration in the barrier layer is greater than that in the fin structure and less than a maximum germanium concentration in each of the source/drain regions.

摘要翻译： 半导体器件包括在衬底上并沿第一方向延伸的翅片结构，在翅片结构上交叉的栅电极，在栅电极的相对侧的翅片结构上的源/漏区和鳍结构之间的阻挡层 和源极/漏极区域中的每一个。 翅片结构包括具有与衬底的晶格常数不同的晶格常数的材料，鳍结构，源极/漏极区和阻挡层包括锗，并且阻挡层中的锗浓度大于鳍结构中的锗浓度 并且在每个源极/漏极区域中小于最大锗浓度。

公开(公告)号：US20160315081A1

公开(公告)日：2016-10-27

申请号：US15013969

申请日：2016-02-02

申请人： Miseon PARK ,  Jongryeol YOO ,  Hyunjung LEE ,  Yong-Suk TAK ,  Bonyoung KOO ,  Sunjung KIM

发明人： Miseon PARK ,  Jongryeol YOO ,  Hyunjung LEE ,  Yong-Suk TAK ,  Bonyoung KOO ,  Sunjung KIM

IPC分类号： H01L27/088 ,  H01L29/417 ,  H01L29/08 ,  H01L29/06 ,  H01L29/161

CPC分类号： H01L27/0886 ,  H01L21/823425 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/41791

摘要： A semiconductor device may include fin active regions extending parallel to each other on a substrate, an isolation region between the fin active regions, gate patterns intersecting the fin active regions and extending parallel to each other, source/drain areas on the fin active regions between the gate patterns and fin active region spacers contacting side surfaces of the fin active regions and formed over a surface of the isolation region between the fin active regions. Uppermost levels of the fin active region spacers may be higher than interfaces between the fin active regions and the source/drain areas. The upper surface of the isolation region may be lower than bottom surfaces of the source/drain areas.

摘要翻译： 半导体器件可以包括在衬底上彼此平行延伸的翅片有源区域，翅片有源区域之间的隔离区域，与翅片有源区域相交并且彼此平行延伸的栅极图案，翅片有源区域之间的源极/漏极区域在 所述栅极图案和鳍状有源区间隔物接触所述翅片有源区域的侧表面并形成在所述鳍片活动区域之间的所述隔离区域的表面上。 翅片有源区间隔物的最上层可以高于翅片有源区和源极/漏极区之间的界面。 隔离区域的上表面可以低于源/漏区域的底表面。

公开(公告)号：US20160293763A1

公开(公告)日：2016-10-06

申请号：US14989956

申请日：2016-01-07

申请人： Dongwoo KIM ,  Seung Hun LEE ,  Sunjung KIM ,  Hyun Jung LEE ,  Bonyoung KOO

发明人： Dongwoo KIM ,  Seung Hun LEE ,  Sunjung KIM ,  Hyun Jung LEE ,  Bonyoung KOO

IPC分类号： H01L29/78 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/165

CPC分类号： H01L29/7849 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/785

摘要： A semiconductor device includes a buffer layer on a substrate, the buffer layer having a lattice constant different from that of the substrate, a fin structure upwardly protruding from the buffer layer, a gate electrode crossing over the fin structure, a cladding layer at a side of the fin structure and covering a top surface and sidewalls of the fin structure, and an interfacial layer between the cladding layer and the fin structure, the interfacial layer including a same element as the buffer layer.

摘要翻译： 半导体器件包括衬底上的缓冲层，缓冲层具有不同于衬底的晶格常数，从缓冲层向上突出的鳍结构，在鳍结构上交叉的栅电极，侧面的覆层 的翅片结构并且覆盖翅片结构的顶表面和侧壁，以及覆盖层和鳍结构之间的界面层，界面层包括与缓冲层相同的元件。