公开(公告)号：US20050057968A1

公开(公告)日：2005-03-17

申请号：US10665685

申请日：2003-09-17

申请人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

发明人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

IPC分类号： G01R31/28 ,  G11C16/02 ,  G11C16/04 ,  G11C16/34 ,  G11C29/50 ,  G11C29/56 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C16/3495 ,  G11C16/04 ,  G11C16/349 ,  G11C29/50 ,  G11C29/50004

摘要： The present invention presents a number of methods for identifying cells with poor subthreshold slope and reduced transconductance. A first set of techniques focuses on the poor subthreshold behavior of degraded storage elements by cycling cells and then programming them to a state above the ground state and the reading them with a control gate voltage below the threshold voltage of this state to see if they still conduct. A second set of embodiments focuses on weak transconductance behavior by reading programmed cells with a control gate voltage well above the threshold voltage. A third set of embodiments alters the voltage levels at the source-drain regions of the storage elements. The current-voltage curve of a good storage element is relatively stable under this shift in bias conditions, while degraded elements exhibit a larger shift. The amount of shift can be used to differentiate the good elements from the bad.

摘要翻译： 本发明提出了用于鉴别具有差的亚阈值斜率和降低的跨导的细胞的许多方法。 第一组技术集中在通过循环单元对劣化的存储元件的差的亚阈值行为进行编程，然后将它们编程到高于基态的状态，并以低于该状态的阈值电压的控制栅极电压读取它们，以查看它们是否仍然 进行。 第二组实施例通过利用远高于阈值电压的控制栅极电压读取编程单元来侧重于弱跨导行为。 第三组实施例改变存储元件的源极 - 漏极区域处的电压电平。 在偏置条件下的这种偏移下，良好存储元件的电流 - 电压曲线相对稳定，而退化元件表现出较大的偏移。 偏移量可以用来区分好的元素和坏的元素。

公开(公告)号：US20080037319A1

公开(公告)日：2008-02-14

申请号：US11389557

申请日：2006-03-23

申请人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

发明人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

IPC分类号： G11C11/34

CPC分类号： G11C16/3495 ,  G11C16/04 ,  G11C16/349 ,  G11C29/50 ,  G11C29/50004

摘要： The present invention presents a number of methods for identifying cells with poor subthreshold slope and reduced transconductance. A first set of techniques focuses on the poor subthreshold behavior of degraded storage elements by cycling cells and then programming them to a state above the ground state and the reading them with a control gate voltage below the threshold voltage of this state to see if they still conduct. A second set of embodiments focuses on weak transconductance behavior by reading programmed cells with a control gate voltage well above the threshold voltage. A third set of embodiments alters the voltage levels at the source-drain regions of the storage elements. The current-voltage curve of a good storage element is relatively stable under this shift in bias conditions, while degraded elements exhibit a larger shift. The amount of shift can be used to differentiate the good elements from the bad.

摘要翻译： 本发明提出了用于鉴别具有差的亚阈值斜率和降低的跨导的细胞的许多方法。 第一组技术集中在通过循环单元对劣化的存储元件的差的亚阈值行为进行编程，然后将它们编程到高于基态的状态，并以低于该状态的阈值电压的控制栅极电压读取它们，以查看它们是否仍然 进行。 第二组实施例通过利用远高于阈值电压的控制栅极电压读取编程单元来侧重于弱跨导行为。 第三组实施例改变存储元件的源极 - 漏极区域处的电压电平。 在偏置条件下的这种偏移下，良好存储元件的电流 - 电压曲线相对稳定，而退化元件表现出较大的偏移。 偏移量可以用来区分好的元素和坏的元素。

公开(公告)号：US07046555B2

公开(公告)日：2006-05-16

申请号：US10665685

申请日：2003-09-17

申请人： Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

发明人： Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

IPC分类号： G11C16/04

CPC分类号： G11C16/3495 ,  G11C16/04 ,  G11C16/349 ,  G11C29/50 ,  G11C29/50004

摘要： A number of methods for identifying cells with poor subthreshold slope and reduced transconductance. A first set of techniques focuses on the poor subthreshold behavior of degraded storage elements by cycling cells and then programming them to a state above the ground state and the reading them with a control gate voltage below the threshold voltage of this state to see if they still conduct. A second set of embodiments focuses on weak transconductance behavior by reading programmed cells with a control gate voltage well above the threshold voltage. A third set of embodiments alters the voltage levels at the source-drain regions of the storage elements. The current-voltage curve of a good storage element is relatively stable under this shift in bias conditions, while degraded elements exhibit a larger shift. The amount of shift can be used to differentiate the good elements from the bad.

摘要翻译： 用于鉴定具有差的亚阈值斜率和降低的跨导的细胞的许多方法。 第一组技术集中在通过循环单元对劣化的存储元件的差的亚阈值行为进行编程，然后将它们编程到高于基态的状态，并以低于该状态的阈值电压的控制栅极电压读取它们，以查看它们是否仍然 进行。 第二组实施例通过利用远高于阈值电压的控制栅极电压读取编程单元来侧重于弱跨导行为。 第三组实施例改变存储元件的源极 - 漏极区域处的电压电平。 在偏置条件下的这种偏移下，良好存储元件的电流 - 电压曲线相对稳定，而退化元件表现出较大的偏移。 偏移量可以用来区分好的元素和坏的元素。

公开(公告)号：US07414894B2

公开(公告)日：2008-08-19

申请号：US11389557

申请日：2006-03-23

申请人： Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

发明人： Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Kazunori Kanebako ,  Tomoharu Tanaka

IPC分类号： G11C11/34

CPC分类号： G11C16/3495 ,  G11C16/04 ,  G11C16/349 ,  G11C29/50 ,  G11C29/50004

摘要： A number of methods for identifying cells with poor subthreshold slope and reduced transconductance. A first set of techniques focuses on the poor subthreshold behavior of degraded storage elements by cycling cells and then programming them to a state above the ground state and the reading them with a control gate voltage below the threshold voltage of this state to see if they still conduct. A second set of embodiments focuses on weak transconductance behavior by reading programmed cells with a control gate voltage well above the threshold voltage. A third set of embodiments alters the voltage levels at the source-drain regions of the storage elements. The current-voltage curve of a good storage element is relatively stable under this shift in bias conditions, while degraded elements exhibit a larger shift. The amount of shift can be used to differentiate the good elements from the bad.

摘要翻译： 用于鉴定具有差的亚阈值斜率和降低的跨导的细胞的许多方法。 第一组技术集中在通过循环单元对劣化的存储元件的差的亚阈值行为进行编程，然后将它们编程到高于基态的状态，并以低于该状态的阈值电压的控制栅极电压读取它们，以查看它们是否仍然 进行。 第二组实施例通过利用远高于阈值电压的控制栅极电压读取编程单元来侧重于弱跨导行为。 第三组实施例改变存储元件的源极 - 漏极区域处的电压电平。 在偏置条件下的这种偏移下，良好存储元件的电流 - 电压曲线相对稳定，而退化元件表现出较大的偏移。 偏移量可以用来区分好的元素和坏的元素。

公开(公告)号：US20050083735A1

公开(公告)日：2005-04-21

申请号：US10689333

申请日：2003-10-20

申请人： Jian Chen ,  Jeffrey Lutze ,  Yan Li ,  Daniel Guterman ,  Tomoharu Tanaka

发明人： Jian Chen ,  Jeffrey Lutze ,  Yan Li ,  Daniel Guterman ,  Tomoharu Tanaka

IPC分类号： G11C16/02 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C16/12

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/3454 ,  G11C16/3459

摘要： The process for programming a set of memory cells is improved by adapting the programming process based on behavior of the memory cells. For example, a set of program pulses is applied to the word line for a set of flash memory cells. A determination is made as to which memory cells are easier to program and which memory cells are harder to program. Bit line voltages (or other parameters) can be adjusted based on the determination of which memory cells are easier to program and which memory cells are harder to program. The programming process will then continue with the adjusted bit line voltages (or other parameters).

摘要翻译： 通过基于存储器单元的行为调整编程过程来改进用于对一组存储器单元进行编程的过程。 例如，一组编程脉冲被施加到一组闪存单元的字线。 确定哪些存储器单元更容易编程，哪些存储器单元难以编程。 可以基于确定哪些存储器单元更容易编程以及哪些存储器单元难以编程来调整位线电压（或其他参数）。 然后，编程过程将继续调整的位线电压（或其他参数）。

公开(公告)号：US20070121383A1

公开(公告)日：2007-05-31

申请号：US11624052

申请日：2007-01-17

申请人： Jian Chen ,  Jeffrey Lutze ,  Yan Li ,  Daniel Guterman ,  Tomoharu Tanaka

发明人： Jian Chen ,  Jeffrey Lutze ,  Yan Li ,  Daniel Guterman ,  Tomoharu Tanaka

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/3454 ,  G11C16/3459

摘要： The process for programming a set of memory cells is improved by adapting the programming process based on behavior of the memory cells. For example, a set of program pulses is applied to the word line for a set of flash memory cells. A determination is made as to which memory cells are easier to program and which memory cells are harder to program. Bit line voltages (or other parameters) can be adjusted based on the determination of which memory cells are easier to program and which memory cells are harder to program. The programming process will then continue with the adjusted bit line voltages (or other parameters).

摘要翻译： 通过基于存储器单元的行为调整编程过程来改进用于对一组存储器单元进行编程的过程。 例如，一组编程脉冲被施加到一组闪存单元的字线。 确定哪些存储器单元更容易编程，哪些存储器单元难以编程。 可以基于确定哪些存储器单元更容易编程以及哪些存储器单元难以编程来调整位线电压（或其他参数）。 然后，编程过程将继续调整的位线电压（或其他参数）。

公开(公告)号：US20050207222A1

公开(公告)日：2005-09-22

申请号：US11124709

申请日：2005-05-09

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34

CPC分类号： G11C16/3463 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

公开(公告)号：US20050024943A1

公开(公告)日：2005-02-03

申请号：US10628962

申请日：2003-07-29

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C16/34 ,  G11C11/34

CPC分类号： G11C16/3404 ,  G11C16/3454

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

摘要翻译： 在非易失性半导体存储器系统（或其他类型的存储器系统）中，通过改变该存储器单元的阈值电压对存储器单元进行编程。 由于系统中不同存储器单元的编程速度的变化，存在一些存储器单元将被过度编程的可能性。 也就是说，在一个示例中，阈值电压将被移动超过预期值或值的范围。 本发明包括确定存储器单元是否被过度编程。

公开(公告)号：US20050024939A1

公开(公告)日：2005-02-03

申请号：US10629068

申请日：2003-07-29

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C11/34

CPC分类号： G11C16/3463 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

摘要翻译： 在非易失性半导体存储器系统（或其他类型的存储器系统）中，通过改变该存储器单元的阈值电压对存储器单元进行编程。 由于系统中不同存储器单元的编程速度的变化，存在一些存储器单元将被过度编程的可能性。 也就是说，在一个示例中，阈值电压将被移动超过预期值或值的范围。 本发明包括确定存储器单元是否被过度编程。

公开(公告)号：US20050128810A1

公开(公告)日：2005-06-16

申请号：US11049802

申请日：2005-02-03

申请人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Masaaki Higashitani

发明人： Jeffrey Lutze ,  Jian Chen ,  Yan Li ,  Masaaki Higashitani

IPC分类号： G11C11/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34

CPC分类号： G11C16/3418 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3454

摘要： A non-volatile semiconductor memory system (or other type of memory system) is programmed in a manner that avoids program disturb. In one embodiment that includes a flash memory system using a NAND architecture, program disturb is avoided by increasing the channel potential of the source side of the NAND string during the programming process. One exemplar implementation includes applying a voltage (e.g. Vdd) to the source contact and turning on the source side select transistor for the NAND sting corresponding to the cell being inhibited. Another implementation includes applying a pre-charging voltage to the unselected word lines of the NAND string corresponding to the cell being inhibited prior to applying the program voltage.

摘要翻译： 以避免程序干扰的方式编程非易失性半导体存储器系统（或其他类型的存储器系统）。 在包括使用NAND架构的闪存系统的一个实施例中，通过在编程处理期间增加NAND串的源侧的沟道电位来避免程序干扰。 一个示例性实施方案包括将电压（例如Vdd）施加到源极触点，并且接通源抑制对应的单元的NAND极的源极侧选择晶体管。 另一种实施方案包括在施加编程电压之前，将预充电电压施加到对应于被禁止的单元的NAND串的未选择字线。