Thin film etching method
    3.
    发明授权
    Thin film etching method 有权
    薄膜蚀刻法

    公开(公告)号:US07935641B2

    公开(公告)日:2011-05-03

    申请号:US11984760

    申请日:2007-11-21

    IPC分类号: H01L21/302 H01L21/461

    CPC分类号: H01L29/7869

    摘要: Example methods may provide a thin film etching method. Example thin film etching methods may include forming a Ga—In—Zn—O film on a substrate, forming a mask layer covering a portion of the Ga—In—Zn—O film, and etching the Ga—In—Zn—O film using the mask layer as an etch barrier, wherein an etching gas used in the etching includes chlorine. The etching gas may further include an alkane (CnH2n+2) and H2 gas. The chlorine gas may be, for example, Cl2, BCl3, and/or CCl3, and the alkane gas may be, for example, CH4.

    摘要翻译: 示例性方法可以提供薄膜蚀刻方法。 示例性薄膜蚀刻方法可以包括在衬底上形成Ga-In-Zn-O膜,形成覆盖Ga-In-Zn-O膜的一部分的掩模层,并且蚀刻Ga-In-Zn-O膜 使用掩模层作为蚀刻阻挡层,其中在蚀刻中使用的蚀刻气体包括氯。 蚀刻气体还可以包括烷烃(C n H 2n + 2)和H 2气体。 氯气可以是例如Cl 2,BCl 3和/或CCl 3,并且烷烃气体可以是例如CH 4。

    Thin film etching method
    4.
    发明申请
    Thin film etching method 有权
    薄膜蚀刻法

    公开(公告)号:US20080166834A1

    公开(公告)日:2008-07-10

    申请号:US11984760

    申请日:2007-11-21

    IPC分类号: H01L21/34

    CPC分类号: H01L29/7869

    摘要: Example methods may provide a thin film etching method. Example thin film etching methods may include forming a Ga—In—Zn—O film on a substrate, forming a mask layer covering a portion of the Ga—In—Zn—O film, and etching the Ga—In—Zn—O film using the mask layer as an etch barrier, wherein an etching gas used in the etching includes chlorine. The etching gas may further include an alkane (CnH2n+2) and H2 gas. The chlorine gas may be, for example, Cl2, BCl3, and/or CCl3, and the alkane gas may be, for example, CH4.

    摘要翻译: 示例性方法可以提供薄膜蚀刻方法。 示例性薄膜蚀刻方法可以包括在衬底上形成Ga-In-Zn-O膜,形成覆盖Ga-In-Zn-O膜的一部分的掩模层,并且蚀刻Ga-In-Zn-O膜 使用掩模层作为蚀刻阻挡层,其中在蚀刻中使用的蚀刻气体包括氯。 蚀刻气体还可以包括烷烃(C n H 2 H 2n + 2 H 2)和H 2 H 2气体。 氯气可以是例如Cl 2,BCl 3和/或CCl 3,烷烃气体可以是 例如CH 4。

    Non-volatile memory device including dummy electrodes and method of fabricating the same
    5.
    发明授权
    Non-volatile memory device including dummy electrodes and method of fabricating the same 有权
    包括虚拟电极的非易失性存储器件及其制造方法

    公开(公告)号:US08748969B2

    公开(公告)日:2014-06-10

    申请号:US12654470

    申请日:2009-12-22

    IPC分类号: H01L29/792

    摘要: Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a substrate and a plurality of semiconductor pillars on the substrate. A plurality of control gate electrodes may be stacked on the substrate and intersecting the plurality of semiconductor pillars. A plurality of dummy electrodes may be stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes. A plurality of via plugs may be connected to the plurality of control gate electrodes. A plurality of wordlines may be on the plurality of via plugs. Each of the plurality of via plugs may penetrate a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.

    摘要翻译: 提供了一种非易失性存储器件及其制造方法。 非易失性存储器件可以包括衬底和衬底上的多个半导体柱。 多个控制栅电极可以堆叠在基板上并与多个半导体柱相交。 多个虚设电极可以与基板上的多个控制栅电极相邻,多个虚设电极与多个控制栅电极间隔开。 多个通孔塞可以连接到多个控制栅电极。 多个字线可以在多个通孔插头上。 多个通孔塞中的每一个可以穿透多个控制栅电极中的相应一个和多个虚拟电极中的至少一个。

    Non-volatile memory device and method of fabricating the same
    6.
    发明申请
    Non-volatile memory device and method of fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号:US20100155826A1

    公开(公告)日:2010-06-24

    申请号:US12654470

    申请日:2009-12-22

    摘要: Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a substrate and a plurality of semiconductor pillars on the substrate. A plurality of control gate electrodes may be stacked on the substrate and intersecting the plurality of semiconductor pillars. A plurality of dummy electrodes may be stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes. A plurality of via plugs may be connected to the plurality of control gate electrodes. A plurality of wordlines may be on the plurality of via plugs. Each of the plurality of via plugs may penetrate a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.

    摘要翻译: 提供了一种非易失性存储器件及其制造方法。 非易失性存储器件可以包括衬底和衬底上的多个半导体柱。 多个控制栅电极可以堆叠在基板上并与多个半导体柱相交。 多个虚设电极可以与基板上的多个控制栅电极相邻,多个虚设电极与多个控制栅电极间隔开。 多个通孔塞可以连接到多个控制栅电极。 多个字线可以在多个通孔插头上。 多个通孔插塞中的每一个可以穿透多个控制栅电极中的相应一个和多个虚拟电极中的至少一个。

    Phase change random access memory devices and methods of operating the same
    7.
    发明申请
    Phase change random access memory devices and methods of operating the same 有权
    相变随机存取存储器件及其操作方法

    公开(公告)号:US20060266993A1

    公开(公告)日:2006-11-30

    申请号:US11443309

    申请日:2006-05-31

    IPC分类号: H01L47/00

    摘要: Provided are phase change random access memory (PRAM) devices and methods of operating the same. The PRAM device may include a switching device, a lower electrode, a lower electrode contact layer, a phase change layer and/or an upper electrode. The lower electrode may be connected to a switching device. The lower electrode contact layer may be formed on the lower electrode. The phase change layer, which may include a bottom surface that contacts an upper surface of the lower electrode contact layer, may be formed on the lower electrode contact layer. The upper electrode may be formed on the phase change layer. The lower electrode contact layer may be formed of a material layer having an absolute value of a Seebeck coefficient higher than TiAlN. The Seebeck coefficient of the lower electrode contact layer may be negative. The material layer may have lower heat conductivity and/or approximately equivalent electrical resistance as TiAlN.

    摘要翻译: 提供了相移随机存取存储器(PRAM)装置及其操作方法。 PRAM器件可以包括开关器件,下电极,下电极接触层,相变层和/或上电极。 下电极可以连接到开关装置。 下电极接触层可以形成在下电极上。 可以在下电极接触层上形成可包括与下电极接触层的上表面接触的底面的相变层。 上电极可以形成在相变层上。 下电极接触层可以由绝缘值高于TiAlN的塞贝克系数的材料层形成。 下电极接触层的塞贝克系数可以为负。 该材料层可具有比TiAlN更低的导热性和/或近似等效的电阻。

    Phase change random access memory devices and methods of operating the same
    8.
    发明授权
    Phase change random access memory devices and methods of operating the same 有权
    相变随机存取存储器件及其操作方法

    公开(公告)号:US07705343B2

    公开(公告)日:2010-04-27

    申请号:US11443309

    申请日:2006-05-31

    IPC分类号: H01L47/00

    摘要: Provided are phase change random access memory (PRAM) devices and methods of operating the same. The PRAM device may include a switching device, a lower electrode, a lower electrode contact layer, a phase change layer and/or an upper electrode. The lower electrode may be connected to a switching device. The lower electrode contact layer may be formed on the lower electrode. The phase change layer, which may include a bottom surface that contacts an upper surface of the lower electrode contact layer, may be formed on the lower electrode contact layer. The upper electrode may be formed on the phase change layer. The lower electrode contact layer may be formed of a material layer having an absolute value of a Seebeck coefficient higher than TiAlN. The Seebeck coefficient of the lower electrode contact layer may be negative. The material layer may have lower heat conductivity and/or approximately equivalent electrical resistance as TiAlN.

    摘要翻译: 提供了相移随机存取存储器(PRAM)装置及其操作方法。 PRAM器件可以包括开关器件,下电极,下电极接触层,相变层和/或上电极。 下电极可以连接到开关装置。 下电极接触层可以形成在下电极上。 可以在下电极接触层上形成可包括与下电极接触层的上表面接触的底面的相变层。 上电极可以形成在相变层上。 下电极接触层可以由绝缘值高于TiAlN的塞贝克系数的材料层形成。 下电极接触层的塞贝克系数可以为负。 该材料层可具有比TiAlN更低的导热性和/或近似等效的电阻。