公开(公告)号：US09000485B2

公开(公告)日：2015-04-07

申请号：US13489733

申请日：2012-06-06

申请人： Jeong-yub Lee ,  Wenxu Xianyu ,  Chang-youl Moon ,  Yong-young Park ,  Woo-young Yang ,  In-jun Hwang

发明人： Jeong-yub Lee ,  Wenxu Xianyu ,  Chang-youl Moon ,  Yong-young Park ,  Woo-young Yang ,  In-jun Hwang

IPC分类号： H01L29/20 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778 ,  H01L29/08 ,  H01L29/49

CPC分类号： H01L21/28264 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42364 ,  H01L29/49 ,  H01L29/66462 ,  H01L29/7787

摘要： An electrode structure, a GaN-based semiconductor device including the electrode structure, and methods of manufacturing the same, may include a GaN-based semiconductor layer and an electrode structure on the GaN-based semiconductor layer. The electrode structure may include an electrode element including a conductive material and a diffusion layer between the electrode element and the GaN-based semiconductor layer. The diffusion layer may include a material which is an n-type dopant with respect to the GaN-based semiconductor layer, and the diffusion layer may contact the GaN-based semiconductor layer. A region of the GaN-based semiconductor layer contacting the diffusion layer may be doped with the n-type dopant. The material of the diffusion layer may comprise a Group 4 element.

摘要翻译： 包括电极结构的电极结构，GaN基半导体器件及其制造方法可以包括在GaN基半导体层上的GaN基半导体层和电极结构。 电极结构可以包括在电极元件和GaN基半导体层之间包括导电材料的电极元件和扩散层。 扩散层可以包括相对于GaN基半导体层为n型掺杂剂的材料，并且扩散层可以接触GaN基半导体层。 与扩散层接触的GaN基半导体层的区域可以掺杂有n型掺杂剂。 扩散层的材料可以包括第4族元素。

公开(公告)号：US20130105863A1

公开(公告)日：2013-05-02

申请号：US13489733

申请日：2012-06-06

申请人： Jeong-yub Lee ,  Wenxu Xianyu ,  Chang-youl Moon ,  Yong-young Park ,  Woo-young Yang ,  In-jun Hwang

发明人： Jeong-yub Lee ,  Wenxu Xianyu ,  Chang-youl Moon ,  Yong-young Park ,  Woo-young Yang ,  In-jun Hwang

IPC分类号： H01L29/778 ,  H01L21/338 ,  B82Y99/00

CPC分类号： H01L21/28264 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42364 ,  H01L29/49 ,  H01L29/66462 ,  H01L29/7787

摘要： An electrode structure, a GaN-based semiconductor device including the electrode structure, and methods of manufacturing the same, may include a GaN-based semiconductor layer and an electrode structure on the GaN-based semiconductor layer. The electrode structure may include an electrode element including a conductive material and a diffusion layer between the electrode element and the GaN-based semiconductor layer. The diffusion layer may include a material which is an n-type dopant with respect to the GaN-based semiconductor layer, and the diffusion layer may contact the GaN-based semiconductor layer. A region of the GaN-based semiconductor layer contacting the diffusion layer may be doped with the n-type dopant. The material of the diffusion layer may comprise a Group 4 element.

摘要翻译： 包括电极结构的电极结构，GaN基半导体器件及其制造方法可以包括在GaN基半导体层上的GaN基半导体层和电极结构。 电极结构可以包括在电极元件和GaN基半导体层之间包括导电材料的电极元件和扩散层。 扩散层可以包括相对于GaN基半导体层为n型掺杂剂的材料，并且扩散层可以接触GaN基半导体层。 与扩散层接触的GaN基半导体层的区域可以掺杂有n型掺杂剂。 扩散层的材料可以包括第4族元素。

公开(公告)号：US20130161587A1

公开(公告)日：2013-06-27

申请号：US13475098

申请日：2012-05-18

申请人： Wenxu Xianyu ,  Chang-youl Moon ,  Jeong-yub Lee ,  Chang-seung Lee

发明人： Wenxu Xianyu ,  Chang-youl Moon ,  Jeong-yub Lee ,  Chang-seung Lee

IPC分类号： H01L29/16 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L29/78684 ,  H01L27/1266 ,  H01L29/1606 ,  H01L29/66045 ,  H01L29/66742 ,  H01L29/78603

摘要： A graphene device may include a channel layer including graphene, a first electrode and second electrode on a first region and second region of the channel layer, respectively, and a capping layer covering the channel layer and the first and second electrodes. A region of the channel layer between the first and second electrodes is exposed by an opening in the capping layer. A gate insulating layer may be on the capping layer to cover the region of the channel layer, and a gate may be on the gate insulating layer.

公开(公告)号：US08999812B2

公开(公告)日：2015-04-07

申请号：US13475098

申请日：2012-05-18

申请人： Wenxu Xianyu ,  Chang-youl Moon ,  Jeong-yub Lee ,  Chang-seung Lee

发明人： Wenxu Xianyu ,  Chang-youl Moon ,  Jeong-yub Lee ,  Chang-seung Lee

IPC分类号： H01L29/16 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/78684 ,  H01L27/1266 ,  H01L29/1606 ,  H01L29/66045 ,  H01L29/66742 ,  H01L29/78603

摘要： A graphene device may include a channel layer including graphene, a first electrode and second electrode on a first region and second region of the channel layer, respectively, and a capping layer covering the channel layer and the first and second electrodes. A region of the channel layer between the first and second electrodes is exposed by an opening in the capping layer. A gate insulating layer may be on the capping layer to cover the region of the channel layer, and a gate may be on the gate insulating layer.

摘要翻译： 石墨烯装置可以分别包括在沟道层的第一区域和第二区域上的包括石墨烯，第一电极和第二电极的沟道层，以及覆盖沟道层和第一和第二电极的覆盖层。 第一和第二电极之间的沟道层的区域被覆盖层中的开口暴露。 栅极绝缘层可以在覆盖层上以覆盖沟道层的区域，并且栅极可以在栅极绝缘层上。

公开(公告)号：US07859054B2

公开(公告)日：2010-12-28

申请号：US11561572

申请日：2006-11-20

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

IPC分类号： H01L21/84 ,  H01L27/12

CPC分类号： H01L27/12 ,  H01L29/78609 ,  H01L29/78696

摘要： A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively.

摘要翻译： 薄膜晶体管包括具有非线性电子移动路径的Si基通道，设置在沟道两侧的源极和漏极，设置在沟道上方的栅极，介于通道和栅极之间的绝缘体，以及 支撑通道的基板，分别设置在通道的两侧的源极和漏极。

公开(公告)号：US07842994B2

公开(公告)日：2010-11-30

申请号：US12007037

申请日：2008-01-04

申请人： Huaxiang Yin ,  Young-soo Park ,  Wenxu Xianyu

发明人： Huaxiang Yin ,  Young-soo Park ,  Wenxu Xianyu

IPC分类号： H01L29/788

CPC分类号： H01L27/0688 ,  H01L21/8221 ,  H01L27/11521 ,  H01L27/11551 ,  H01L29/7854

摘要： A nonvolatile memory transistor having a poly-silicon fin, a stacked nonvolatile memory device having the transistor, a method of fabricating the transistor, and a method of fabricating the device are provided. The device may include an active fin protruding upward from a semiconductor substrate. At least one first charge storing pattern on a top surface and sidewalls of the active fin may be formed. At least one first control gate line on a top surface of the at least one first charge storing pattern may be formed. The at least one first control gate line may intersect over the active fin. An interlayer dielectric layer may be formed on the at least one first control gate line. A poly-silicon fin may be formed on the interlayer dielectric layer. At least one second charge storing pattern on a top surface and sidewalls of the poly-silicon fin may be formed. At least one second control gate line on a top surface of the at least one second charge storing pattern may be formed, and the at least one second control gate line may intersect over the poly-silicon fin.

摘要翻译： 提供了具有多晶硅鳍片的非易失性存储晶体管，具有该晶体管的堆叠非易失性存储器件，该晶体管的制造方法以及该器件的制造方法。 该器件可以包括从半导体衬底向上突出的活性鳍片。 可以形成顶表面上的至少一个第一电荷存储图案和有源鳍片的侧壁。 可以形成至少一个第一电荷存储图案的顶表面上的至少一个第一控制栅极线。 至少一个第一控制栅极线可以在有源鳍上交叉。 层间绝缘层可以形成在至少一个第一控制栅极线上。 多晶硅鳍可以形成在层间介电层上。 可以形成多晶硅鳍片的顶表面和侧壁上的至少一个第二电荷存储图案。 可以形成至少一个第二电荷存储图案的顶表面上的至少一个第二控制栅极线，并且所述至少一个第二控制栅极线可以在多晶硅鳍上相交。

公开(公告)号：US20100200834A1

公开(公告)日：2010-08-12

申请号：US12659776

申请日：2010-03-22

申请人： Hans S. Cho ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-Young Kim ,  Huaxiang Yin ,  Xiaoxin Zhang

发明人： Hans S. Cho ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-Young Kim ,  Huaxiang Yin ,  Xiaoxin Zhang

IPC分类号： H01L29/775 ,  H01L29/04 ,  H01L29/02 ,  H01L27/12

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/66772 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696 ,  Y10S977/762 ,  Y10S977/814 ,  Y10S977/90 ,  Y10S977/932 ,  Y10S977/943

摘要： Example embodiments relate to a crystalline nanowire substrate having a structure in which a crystalline nanowire film having a relatively fine line-width may be formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the crystalline nanowire substrate may include preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.

摘要翻译： 示例性实施例涉及具有其中可以在基板上形成具有相对较细的线宽的结晶纳米线膜的结构的晶体纳米线基板及其制造方法，以及使用其制造薄膜晶体管的方法 。 制造结晶纳米线基板的方法可以包括制备基板，在基板上形成绝缘膜，在绝缘膜上形成硅膜，将绝缘膜和硅膜图案化成带状，减小线宽 绝缘膜通过底切蚀刻绝缘膜的至少一个侧面，并且通过使硅膜熔化和结晶而在绝缘膜的上表面上形成自对准硅纳米线膜。

公开(公告)号：US07511381B2

公开(公告)日：2009-03-31

申请号：US11248620

申请日：2005-10-13

申请人： Takashi Noguchi ,  Wenxu Xianyu ,  Hans S. Cho ,  Huaxiang Yin

发明人： Takashi Noguchi ,  Wenxu Xianyu ,  Hans S. Cho ,  Huaxiang Yin

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/02598 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/2026 ,  H01L27/1281 ,  H01L29/66772

摘要： A thin film transistor (TFT) and a method of manufacturing the same are provided. The TFT includes a transparent substrate, an insulating layer on a region of the transparent substrate, a monocrystalline silicon layer, which includes source, drain, and channel regions, on the insulating layer and a gate insulating film and a gate electrode on the channel region of the monocrystalline silicon layer.

摘要翻译： 提供薄膜晶体管（TFT）及其制造方法。 TFT包括透明基板，在透明基板的区域上的绝缘层，在绝缘层上包括源极，漏极和沟道区的单晶硅层，以及沟道区上的栅极绝缘膜和栅极电极 的单晶硅层。

公开(公告)号：US07479442B2

公开(公告)日：2009-01-20

申请号：US11071175

申请日：2005-03-04

申请人： Takashi Noguchi ,  Wenxu Xianyu ,  Huaxiang Yin

发明人： Takashi Noguchi ,  Wenxu Xianyu ,  Huaxiang Yin

IPC分类号： H01L21/461

CPC分类号： H01L21/76254

摘要： Provided is a method of manufacturing a single crystal Si film. The method includes: preparing a Si substrate on which a first oxide layer is formed and an insulating substrate on which a second oxide layer is formed; forming a dividing layer at a predetermined depth from a surface of the Si substrate by implanting hydrogen ions from above the first oxide layer; bonding the insulating substrate to the Si substrate so that the first oxide layer contacts the second oxide layer; and forming a single crystal Si film having a predetermined thickness on the insulating substrate by cutting the dividing layer by irradiating a laser beam from above the insulating substrate. Therefore, a single crystal Si film having a predetermined thickness can be formed on an insulating substrate.

摘要翻译： 提供制造单晶Si膜的方法。 该方法包括：制备其上形成有第一氧化物层的Si衬底和形成有第二氧化物层的绝缘衬底; 通过从所述第一氧化物层上方注入氢离子，从所述Si衬底的表面形成预定深度的分隔层; 将绝缘基板接合到Si衬底，使得第一氧化物层接触第二氧化物层; 以及通过从绝缘基板上方照射激光束切割分隔层，在绝缘基板上形成具有预定厚度的单晶硅膜。 因此，可以在绝缘基板上形成具有预定厚度的单晶Si膜。

公开(公告)号：US20080118754A1

公开(公告)日：2008-05-22

申请号：US11976009

申请日：2007-10-19

申请人： Wenxu Xianyu ,  Young-soo Park ,  Hans S. Cho ,  Huaxiang Yin ,  Hyuck Lim

发明人： Wenxu Xianyu ,  Young-soo Park ,  Hans S. Cho ,  Huaxiang Yin ,  Hyuck Lim

IPC分类号： C30B13/06 ,  B32B9/00

CPC分类号： C30B29/06 ,  C30B13/24 ,  C30B25/02 ,  C30B29/60 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/02675 ,  H01L29/42392 ,  H01L29/78696 ,  Y10T428/2962

摘要： A method of fabricating a single crystal silicon rod may include forming an insulation layer on a substrate, forming a hole in the insulation layer, selectively growing silicon in the hole, forming a silicon layer on the hole and on the insulation layer, forming a rod pattern on the silicon layer in a direction that is non-radial with respect to the hole, and melting the silicon layer and crystallizing the silicon layer by illuminating a laser beam on the silicon layer where the rod pattern is formed to generate a nucleation site at a position corresponding to the hole. According to the method, a single crystal silicon rod having no defects may be formed.

摘要翻译： 制造单晶硅棒的方法可以包括在衬底上形成绝缘层，在绝缘层中形成孔，选择性地生长孔中的硅，在孔和绝缘层上形成硅层，形成棒 在相对于孔的非径向的方向上在硅层上形成图案，并且通过照射形成棒图案的硅层上的激光束来熔化硅层并使硅层结晶，从而在硅层上产生成核位置 对应于孔的位置。 根据该方法，可以形成没有缺陷的单晶硅棒。