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公开(公告)号：US08158993B2
公开(公告)日：2012-04-17
申请号：US11843916
申请日：2007-08-23
CPC分类号： H01L33/24 , H01L33/0075 , H01L33/08 , H01L33/32
摘要： A nitride semiconductor light emitting device is formed by: forming a resist pattern on a first nitride semiconductor layer formed on a substrate, the resist pattern having a region whose inclination angle relative to a substrate surface changes smoothly as viewed in a cross section perpendicular to the substrate surface; etching the substrate by using the resist pattern as a mask to transfer the resist pattern to the first nitride semiconductor layer; and forming an light emitting layer on the patterned first nitride semiconductor layer. The nitride semiconductor light emitting device can emit near-white light or have a wavelength range generally equivalent to or near visible light range.
摘要翻译： 氮化物半导体发光器件通过以下方式形成：在形成在衬底上的第一氮化物半导体层上形成抗蚀剂图案，该抗蚀剂图案具有相对于衬底表面倾斜的角度在垂直于 基材表面; 通过使用抗蚀剂图案作为掩模来蚀刻基板，以将抗蚀剂图案转印到第一氮化物半导体层; 以及在所述图案化的第一氮化物半导体层上形成发光层。 氮化物半导体发光器件可以发射近白光或具有大致等于或接近可见光范围的波长范围。
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公开(公告)号：US08658440B2
公开(公告)日：2014-02-25
申请号：US13311644
申请日：2011-12-06
CPC分类号： H01L33/24 , H01L33/0075 , H01L33/08 , H01L33/32
摘要： A nitride semiconductor light emitting device is formed by: forming a resist pattern on a first nitride semiconductor layer formed on a substrate, the resist pattern having a region whose inclination angle relative to a substrate surface changes smoothly as viewed in a cross section perpendicular to the substrate surface; etching the substrate by using the resist pattern as a mask to transfer the resist pattern to the first nitride semiconductor layer; and forming an light emitting layer on the patterned first nitride semiconductor layer. The nitride semiconductor light emitting device can emit near-white light or have a wavelength range generally equivalent to or near visible light range.
摘要翻译： 氮化物半导体发光器件通过以下方式形成：在形成在衬底上的第一氮化物半导体层上形成抗蚀剂图案，该抗蚀剂图案具有相对于衬底表面倾斜的角度在垂直于 基材表面; 通过使用抗蚀剂图案作为掩模来蚀刻基板，以将抗蚀剂图案转印到第一氮化物半导体层; 以及在所述图案化的第一氮化物半导体层上形成发光层。 氮化物半导体发光器件可以发射近白光或具有大致等于或接近可见光范围的波长范围。
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公开(公告)号：US20080073657A1
公开(公告)日：2008-03-27
申请号：US11843916
申请日：2007-08-23
IPC分类号： H01L33/00
CPC分类号： H01L33/24 , H01L33/0075 , H01L33/08 , H01L33/32
摘要： A nitride semiconductor light emitting device is formed by: forming a resist pattern on a first nitride semiconductor layer formed on a substrate, the resist pattern having a region whose inclination angle relative to a substrate surface changes smoothly as viewed in a cross section perpendicular to the substrate surface; etching the substrate by using the resist pattern as a mask to transfer the resist pattern to the first nitride semiconductor layer; and forming an light emitting layer on the patterned first nitride semiconductor layer. The nitride semiconductor light emitting device can emit near-white light or have a wavelength range generally equivalent to or near visible light range.
摘要翻译： 氮化物半导体发光器件通过以下方式形成：在形成在衬底上的第一氮化物半导体层上形成抗蚀剂图案，该抗蚀剂图案具有相对于衬底表面倾斜的角度在垂直于 基材表面; 通过使用抗蚀剂图案作为掩模来蚀刻基板，以将抗蚀剂图案转印到第一氮化物半导体层; 以及在所述图案化的第一氮化物半导体层上形成发光层。 氮化物半导体发光器件可以发射近白光或具有大致等于或接近可见光范围的波长范围。
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公开(公告)号：US20120077298A1
公开(公告)日：2012-03-29
申请号：US13311644
申请日：2011-12-06
IPC分类号： H01L33/08
CPC分类号： H01L33/24 , H01L33/0075 , H01L33/08 , H01L33/32
摘要： A nitride semiconductor light emitting device is formed by: forming a resist pattern on a first nitride semiconductor layer formed on a substrate, the resist pattern having a region whose inclination angle relative to a substrate surface changes smoothly as viewed in a cross section perpendicular to the substrate surface; etching the substrate by using the resist pattern as a mask to transfer the resist pattern to the first nitride semiconductor layer; and forming an light emitting layer on the patterned first nitride semiconductor layer. The nitride semiconductor light emitting device can emit near-white light or have a wavelength range generally equivalent to or near visible light range.
摘要翻译： 氮化物半导体发光器件通过以下方式形成：在形成在衬底上的第一氮化物半导体层上形成抗蚀剂图案，该抗蚀剂图案具有相对于衬底表面倾斜的角度在垂直于 基材表面; 通过使用抗蚀剂图案作为掩模来蚀刻基板，以将抗蚀剂图案转印到第一氮化物半导体层; 以及在所述图案化的第一氮化物半导体层上形成发光层。 氮化物半导体发光器件可以发射近白光或具有大致等于或接近可见光范围的波长范围。
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公开(公告)号：US20100148309A1
公开(公告)日：2010-06-17
申请号：US12636934
申请日：2009-12-14
申请人： Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata , Jiro Higashino
发明人： Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata , Jiro Higashino
CPC分类号： H01L21/02639 , H01L21/0242 , H01L21/02433 , H01L21/02516 , H01L21/0254 , H01L21/0262 , H01L21/0265 , H01L33/007 , H01L33/0079
摘要： There is provided a method for manufacturing a semiconductor device in which a selective growth mask for partially covering a growth substrate is formed on a growth substrate; a buffer layer that is thicker than the mask is formed on a non-mask part not covered by the mask on the growth substrate, and a predetermined facet is exposed on the surface of the buffer layer; a semiconductor film is laterally grown using the buffer layer as a starting point, and a lateral growth layer for covering the mask is formed while cavities are formed on the upper part of the mask; and a device function layer is epitaxially grown on the lateral growth layer. The cavity formation step includes a first step for growing a semiconductor film at a growth rate and a second step for growing another semiconductor film at another growth rate mutually different from the first growth rate, wherein the first and second steps are carried out a plurality of times in alternating fashion.
摘要翻译： 提供一种制造半导体器件的方法，其中在生长衬底上形成用于部分覆盖生长衬底的选择性生长掩模; 在生长衬底上未被掩模覆盖的非掩模部分上形成比掩模厚的缓冲层，并且在缓冲层的表面上露出预定的刻面; 使用缓冲层作为起点横向生长半导体膜，并且形成用于覆盖掩模的横向生长层，同时在掩模的上部形成空腔; 并且在侧向生长层上外延生长器件功能层。 空腔形成步骤包括以生长速率生长半导体膜的第一步骤和用于以与第一生长速率相互不同的另一生长速率生长另一半导体膜的第二步骤，其中第一和第二步骤执行多个 时代以交替的方式。
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公开(公告)号：US08530256B2
公开(公告)日：2013-09-10
申请号：US13416635
申请日：2012-03-09
申请人： Yasuyuki Shibata , Ji-Hao Liang , Takako Chinone
发明人： Yasuyuki Shibata , Ji-Hao Liang , Takako Chinone
IPC分类号： H01L21/205 , H01L33/32
CPC分类号： H01L21/0254 , H01L21/0242 , H01L21/02458 , H01L21/02494 , H01L21/02576 , H01L21/0262 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L33/007 , H01L33/0079
摘要： (a) Forming on a growth substrate a void-containing layer that is made of a group III nitride compound semiconductor and contains voids. (b) Forming on the void-containing layer an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids. (c) Forming on the n-type layer an active layer made of a group III nitride compound semiconductor. (d) Forming on the active layer a p-type layer made of a p-type group III nitride compound semiconductor. (e) Bonding a support substrate above the p-type layer. (f) Peeling off the growth substrate at the boundary where the void are produced. (g) Planarizing the n-type layer. Step (b) comprises (b1) forming part of the n-type layer under conditions where horizontal growth is relatively weak and (b2) forming the remaining part of the n-type layer under conditions where horizontal growth is relatively strong.
摘要翻译： （a）在生长衬底上形成由III族氮化物化合物半导体制成且含有空隙的含空隙层。 （b）在含空隙层上形成由n型III族氮化物化合物半导体制成并用于封闭空隙的n型层。 （c）在n型层上形成由III族氮化物化合物半导体制成的有源层。 （d）在有源层上形成由p型III族氮化物半导体构成的p型层。 （e）将支撑衬底粘合在p型层上。 （f）在生成空隙的边界处剥离生长衬底。 （g）平面化n型层。 步骤（b）包括（b1）在水平生长相对较弱的条件下形成n型层的一部分，（b2）在水平生长相对较强的条件下形成n型层的剩余部分。
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公开(公告)号：US08236672B2
公开(公告)日：2012-08-07
申请号：US12636961
申请日：2009-12-14
申请人： Takako Chinone , Ji-Hao Liang , Yasuyuki Shibata , Jiro Higashino
发明人： Takako Chinone , Ji-Hao Liang , Yasuyuki Shibata , Jiro Higashino
CPC分类号： H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02636 , H01L33/007 , H01L33/0079
摘要： A cavity-containing layer having a plurality of cavities is formed on a growth substrate by carrying out in alternating fashion a plurality of cycles of a first and second growth steps of growing a group III nitride at growth rates different from each other. The semiconductor epitaxial layer is subsequently formed on the cavity-containing layer, after which a support substrate is bonded to the semiconductor epitaxial layer. The growth substrate is separated from the cavity-containing layer.
摘要翻译： 通过以不同的生长速率生长III族氮化物的第一和第二生长步骤的多个循环的交替方式，在生长衬底上形成具有多个空腔的含空腔层。 随后在空腔含有层上形成半导体外延层，然后将支撑衬底接合到半导体外延层。 生长衬底与含空腔层分离。
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公开(公告)号：US20120231608A1
公开(公告)日：2012-09-13
申请号：US13416635
申请日：2012-03-09
申请人： Yasuyuki SHIBATA , Ji-Hao Liang , Takako Chinone
发明人： Yasuyuki SHIBATA , Ji-Hao Liang , Takako Chinone
IPC分类号： H01L21/20
CPC分类号： H01L21/0254 , H01L21/0242 , H01L21/02458 , H01L21/02494 , H01L21/02576 , H01L21/0262 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L33/007 , H01L33/0079
摘要： (a) Forming on a growth substrate a void-containing layer that is made of a group III nitride compound semiconductor and contains voids. (b) Forming on the void-containing layer an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids. (c) Forming on the n-type layer an active layer made of a group III nitride compound semiconductor. (d) Forming on the active layer a p-type layer made of a p-type group III nitride compound semiconductor. (e) Bonding a support substrate above the p-type layer. (f) Peeling off the growth substrate at the boundary where the void are produced. (g) Planarizing the n-type layer. Step (b) comprises (b1) forming part of the n-type layer under conditions where horizontal growth is relatively weak and (b2) forming the remaining part of the n-type layer under conditions where horizontal growth is relatively strong.
摘要翻译： （a）在生长衬底上形成由III族氮化物化合物半导体制成且含有空隙的含空隙层。 （b）在含空隙层上形成由n型III族氮化物化合物半导体制成并用于封闭空隙的n型层。 （c）在n型层上形成由III族氮化物化合物半导体制成的有源层。 （d）在有源层上形成由p型III族氮化物半导体构成的p型层。 （e）将支撑衬底粘合在p型层上。 （f）在生成空隙的边界处剥离生长衬底。 （g）平面化n型层。 步骤（b）包括（b1）在水平生长相对较弱的条件下形成n型层的一部分，（b2）在水平生长相对较强的条件下形成n型层的剩余部分。
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公开(公告)号：US08111350B2
公开(公告)日：2012-02-07
申请号：US13005710
申请日：2011-01-13
申请人： Jiro Higashino , Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata
发明人： Jiro Higashino , Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata
IPC分类号： G02F1/1335
CPC分类号： H01L33/007 , H01L33/20 , H01L33/22 , H01L33/32
摘要： A plurality of protrusions is formed on the C-plane substrate with a corundum structure. A base film made of a III-V compound semiconductor including Ga and N is formed on the surface of the substrate. The surface of the base film is flatter than the surface of the substrate. A light emitting structure including Ga and N is disposed on the base film. The protrusions are regularly arranged in a first direction that is tilted by less than 15 degrees with respect to the a-axis of the base film and in a second direction that is orthogonal to the first direction. Each protrusion has two first parallel sides tilted by less than 15 degrees relative to an m-axis and two second parallel sides tilted by less than 15 degrees relative to the a-axis. An interval between the two second sides is wider than an interval between the two first sides.
摘要翻译： 在具有刚玉结构的C面基板上形成多个突起。 在基板的表面上形成由包含Ga和N的III-V族化合物半导体制成的基膜。 基膜的表面比基材的表面更平坦。 包含Ga和N的发光结构设置在基膜上。 突起规则地布置在相对于基膜的a轴倾斜小于15度并且在与第一方向正交的第二方向上倾斜的第一方向上。 每个突起具有相对于m轴倾斜小于15度的两个第一平行边和相对于a轴倾斜小于15度的两个第二平行边。 两个第二侧之间的间隔比两个第一侧之间的间隔宽。
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公开(公告)号：US08008170B2
公开(公告)日：2011-08-30
申请号：US12636934
申请日：2009-12-14
申请人： Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata , Jiro Higashino
发明人： Ji-Hao Liang , Takako Chinone , Yasuyuki Shibata , Jiro Higashino
IPC分类号： H01L21/36 , H01L21/20 , H01L29/04 , H01L31/036 , H01L33/00
CPC分类号： H01L21/02639 , H01L21/0242 , H01L21/02433 , H01L21/02516 , H01L21/0254 , H01L21/0262 , H01L21/0265 , H01L33/007 , H01L33/0079
摘要： There is provided a method for manufacturing a semiconductor device in which a selective growth mask for partially covering a growth substrate is formed on a growth substrate; a buffer layer that is thicker than the mask is formed on a non-mask part not covered by the mask on the growth substrate, and a predetermined facet is exposed on the surface of the buffer layer; a semiconductor film is laterally grown using the buffer layer as a starting point, and a lateral growth layer for covering the mask is formed while cavities are formed on the upper part of the mask; and a device function layer is epitaxially grown on the lateral growth layer. The cavity formation step includes a first step for growing a semiconductor film at a growth rate and a second step for growing another semiconductor film at another growth rate mutually different from the first growth rate, wherein the first and second steps are carried out a plurality of times in alternating fashion.
摘要翻译： 提供一种制造半导体器件的方法，其中在生长衬底上形成用于部分覆盖生长衬底的选择性生长掩模; 在生长衬底上未被掩模覆盖的非掩模部分上形成比掩模厚的缓冲层，并且在缓冲层的表面上露出预定的刻面; 使用缓冲层作为起点横向生长半导体膜，并且形成用于覆盖掩模的横向生长层，同时在掩模的上部形成空腔; 并且在侧向生长层上外延生长器件功能层。 空腔形成步骤包括以生长速率生长半导体膜的第一步骤和用于以与第一生长速率相互不同的另一生长速率生长另一半导体膜的第二步骤，其中第一和第二步骤执行多个 时代以交替的方式。
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