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    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor
    1.
    发明授权
    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor 失效
    用于半导体存储单元的存储电容器和制造存储电容器的方法

    公开(公告)号：US07449739B2

    公开(公告)日：2008-11-11

    申请号：US11339744

    申请日：2006-01-25

    申请人： Johannes Heitmann ,  Peter Moll ,  Odo Wunnicke ,  Till Schloesser

    发明人： Johannes Heitmann ,  Peter Moll ,  Odo Wunnicke ,  Till Schloesser

    IPC分类号： H01L27/108 ,  H01L29/94

    CPC分类号： H01L28/91 ,  H01L27/10852

    摘要： A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and a cup-shaped upper section, which is placed on top of the lower section. A lower section of a backside electrode encloses the pad-shaped section of the storage electrode. An upper section of the backside electrode is enclosed by the cup-shaped upper section of the storage electrode. A first capacitor dielectric separates the lower sections of the backside and the storage electrodes. A second capacitor dielectric separates the upper sections of the backside and the storage electrodes. The electrode area of the capacitor is enlarged while the requirements for the deposition of the capacitor dielectric are relaxed. Aspect ratios for deposition and etching processes are reduced.

    摘要翻译： 公开了用于动态半导体存储器单元的电容器，存储器和制造存储器的方法。 在一个实施例中，电容器的存储电极具有衬垫形下部和杯形上部，其放置在下部的顶部。 背面电极的下部包围存储电极的垫状部分。 背面电极的上部被储存电极的杯状上部包围。 第一电容器介质分离背面的下部和存储电极。 第二电容器电介质将背面的上部和存储电极分开。 电容器的电极面积被放大，而电容器电介质沉积的要求被放宽。 降低沉积和蚀刻工艺的长宽比。

    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor
    2.
    发明申请
    Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor 失效
    用于半导体存储单元的存储电容器和制造存储电容器的方法

    公开(公告)号：US20070170487A1

    公开(公告)日：2007-07-26

    申请号：US11339744

    申请日：2006-01-25

    申请人： Johannes Heitmann ,  Peter Moll ,  Odo Wunnicke ,  Till Schloesser

    发明人： Johannes Heitmann ,  Peter Moll ,  Odo Wunnicke ,  Till Schloesser

    IPC分类号： H01L27/108 ,  H01L21/20

    CPC分类号： H01L28/91 ,  H01L27/10852

    摘要： A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and a cup-shaped upper section, which is placed on top of the lower section. A lower section of a backside electrode encloses the pad-shaped section of the storage electrode. An upper section of the backside electrode is enclosed by the cup-shaped upper section of the storage electrode. A first capacitor dielectric separates the lower sections of the backside and the storage electrodes. A second capacitor dielectric separates the upper sections of the backside and the storage electrodes. The electrode area of the capacitor is enlarged while the requirements for the deposition of the capacitor dielectric are relaxed. Aspect ratios for deposition and etching processes are reduced.

    摘要翻译： 公开了用于动态半导体存储器单元的电容器，存储器和制造存储器的方法。 在一个实施例中，电容器的存储电极具有衬垫形下部和杯形上部，其放置在下部的顶部。 背面电极的下部包围存储电极的垫状部分。 背面电极的上部被储存电极的杯状上部包围。 第一电容器介质分离背面的下部和存储电极。 第二电容器电介质将背面的上部和存储电极分开。 电容器的电极面积被放大，而电容器电介质沉积的要求被放宽。 降低沉积和蚀刻工艺的长宽比。

    Method for producing a trench transistor and trench transistor
    7.
    发明申请
    Method for producing a trench transistor and trench transistor 失效
    沟槽晶体管和沟槽晶体管的制造方法

    公开(公告)号：US20070075361A1

    公开(公告)日：2007-04-05

    申请号：US11529446

    申请日：2006-09-28

    申请人： Richard Luyken ,  Hans-Peter Moll ,  Martin Popp ,  Till Schloesser ,  Marc Strasser ,  Rolf Weis

    发明人： Richard Luyken ,  Hans-Peter Moll ,  Martin Popp ,  Till Schloesser ,  Marc Strasser ,  Rolf Weis

    IPC分类号： H01L21/336 ,  H01L29/76

    CPC分类号： H01L21/26586 ,  H01L29/66537 ,  H01L29/66621 ,  H01L29/7834

    摘要： In a method for producing a trench transistor, a substrate of a first conduction type is provided and a trench in the substrate and a gate dielectric in the trench are formed. A first conductive filling in the trench as a gate electrode on the gate dielectric and first source and drain regions are formed. An etched-back first conductive filling is produced by etching back the first conductive filling down to a depth below the first source and drain regions and second source and drain regions are formed. The second source and drain regions adjoin the first source and drain regions and extend to a depth at least as far as the etched-back first conductive filling. An insulation spacer above the etched-back first conductive filling is formed in the trench and a second conductive filling is provided in the trench as an upper part of the gate electrode.

    摘要翻译： 在制造沟槽晶体管的方法中，提供第一导电类型的衬底，并且形成衬底中的沟槽和沟槽中的栅极电介质。 形成沟槽中作为栅极电介质和第一源极和漏极区域上的栅电极的第一导电填充物。 蚀刻后的第一导电填充物是通过将第一导电填料向下蚀刻回到低于第一源的深度并形成漏极区和第二源极和漏极区而产生的。 第二源极和漏极区域与第一源极和漏极区域相邻并且延伸至至少与蚀刻后的第一导电填充物一样深的深度。 在所述沟槽中形成有在所述蚀刻后的第一导电填充物上方的绝缘间隔物，并且在所述沟槽中设置第二导电填充物作为所述栅电极的上部。

    Semiconductor substrate with trenches of varying depth
    8.
    发明授权
    Semiconductor substrate with trenches of varying depth 失效
    具有不同深度的沟槽的半导体衬底

    公开(公告)号：US06932916B2

    公开(公告)日：2005-08-23

    申请号：US10425179

    申请日：2003-04-29

    申请人： Dirk Manger ,  Hans-Peter Moll ,  Till Schloesser

    发明人： Dirk Manger ,  Hans-Peter Moll ,  Till Schloesser

    IPC分类号： H01L21/308 ,  H01L21/334 ,  H01L21/762 ,  H01L21/8242 ,  B44C1/22 ,  H01L21/302

    CPC分类号： H01L21/3081 ,  H01L21/3083 ,  H01L21/76229 ,  H01L27/1087 ,  H01L29/66181

    摘要： A method for etching trenches having different depths on a semiconductor substrate includes providing a mask with first and second openings. The first and second openings are located where corresponding first and second trenches are to be etched. A slow-etch region, made of a slow-etch material, is provided above the substrate at a location corresponding to the second opening. When exposed to a selected etchant, the slow-etch material is etched at a rate less than the rate at which the semiconductor substrate is etched when exposed to the selected etchant.

    摘要翻译： 在半导体衬底上蚀刻具有不同深度的沟槽的方法包括：提供具有第一和第二开口的掩模。 第一和第二开口位于相应的第一和第二沟槽将被蚀刻的位置。 在对应于第二开口的位置处，在衬底上方设置由缓蚀刻材料制成的缓蚀刻区域。 当暴露于所选择的蚀刻剂时，以暴露于所选择的蚀刻剂的半导体衬底被蚀刻的速率小的速率蚀刻慢刻蚀材料。

    Storage capacitor, a memory device and a method of manufacturing the same
    9.
    发明授权
    Storage capacitor, a memory device and a method of manufacturing the same 有权
    存储电容器，存储器件及其制造方法

    公开(公告)号：US07687343B2

    公开(公告)日：2010-03-30

    申请号：US11633090

    申请日：2006-12-04

    申请人： Peter Moll ,  Peter Baars ,  Till Schloesser ,  Rolf Weis ,  Klaus Muemmler

    发明人： Peter Moll ,  Peter Baars ,  Till Schloesser ,  Rolf Weis ,  Klaus Muemmler

    IPC分类号： H01L21/8242

    CPC分类号： H01L28/90 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897

    摘要： A storage capacitor includes a first capacitor portion and a second capacitor portion, the second capacitor portion being disposed above the first capacitor portion, thereby defining a first direction. The first and the second portions each include a hollow body made of a conductive material, respectively, thereby forming a first capacitor electrode. An upper diameter of each of the hollow bodies is larger than a lower diameter of the hollow body, the diameter being measured perpendicularly with respect to the first direction. The storage capacitor also includes a second capacitor electrode and a dielectric material disposed between the first and the second capacitor electrodes. The storage capacitor also includes an insulating material disposed outside the hollow bodies, and a layer of an insulating material. A lower side of the insulating layer is disposed at a height of an upper side of the first capacitor portion.

    摘要翻译： 存储电容器包括第一电容器部分和第二电容器部分，第二电容器部分设置在第一电容器部分上方，从而限定第一方向。 第一和第二部分分别包括由导电材料制成的中空体，从而形成第一电容器电极。 每个中空体的上直径大于中空体的下直径，其直径相对于第一方向垂直地被测量。 存储电容器还包括设置在第一和第二电容器电极之间的第二电容器电极和介电材料。 存储电容器还包括设置在中空体外部的绝缘材料和绝缘材料层。 绝缘层的下侧设置在第一电容器部分的上侧的高度处。

    Storage capacitor, a memory device and a method of manufacturing the same
    10.
    发明申请
    Storage capacitor, a memory device and a method of manufacturing the same 有权
    存储电容器，存储器件及其制造方法

    公开(公告)号：US20080128773A1

    公开(公告)日：2008-06-05

    申请号：US11633090

    申请日：2006-12-04

    申请人： Peter Moll ,  Peter Baars ,  Till Schloesser ,  Rolf Weis ,  Klaus Muemmler

    发明人： Peter Moll ,  Peter Baars ,  Till Schloesser ,  Rolf Weis ,  Klaus Muemmler

    IPC分类号： H01L27/108

    CPC分类号： H01L28/90 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897

    摘要： A storage capacitor includes a first capacitor portion and a second capacitor portion, the second capacitor portion being disposed above the first capacitor portion, thereby defining a first direction. The first and the second portions each include a hollow body made of a conductive material, respectively, thereby forming a first capacitor electrode. An upper diameter of each of the hollow bodies is larger than a lower diameter of the hollow body, the diameter being measured perpendicularly with respect to the first direction. The storage capacitor also includes a second capacitor electrode and a dielectric material disposed between the first and the second capacitor electrodes. The storage capacitor also includes an insulating material disposed outside the hollow bodies, and a layer of an insulating material. A lower side of the insulating layer is disposed at a height of an upper side of the first capacitor portion.

    摘要翻译： 存储电容器包括第一电容器部分和第二电容器部分，第二电容器部分设置在第一电容器部分上方，从而限定第一方向。 第一和第二部分分别包括由导电材料制成的中空体，从而形成第一电容器电极。 每个中空体的上直径大于中空体的下直径，其直径相对于第一方向垂直地被测量。 存储电容器还包括设置在第一和第二电容器电极之间的第二电容器电极和介电材料。 存储电容器还包括设置在中空体外部的绝缘材料和绝缘材料层。 绝缘层的下侧设置在第一电容器部分的上侧的高度处。