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公开(公告)号：US5283579A
公开(公告)日：1994-02-01
申请号：US847458
申请日：1992-03-06
申请人： Ali Tasdighi , Roger A. Levinson , Quoi V. Huynh , John M. Caruso
发明人： Ali Tasdighi , Roger A. Levinson , Quoi V. Huynh , John M. Caruso
摘要： A digital to analog converter (DAC) incorporates a novel subranging voltage output DAC that delivers high multiplying bandwidth while consuming low power and requires small silicon area. The higher order digital input bits (MSBS) select a voltage range (VMSB) from a first resistor divider DAC network. The VMSB is then applied to the input of a small high speed low power differential input single ended output LSB programmable attenuator amplifier. Transistor follower devices effectively buffer the MSB section to the LSB section and increase bandwidth and speed of operation as well as permitting multichannel sharing of a single precision MSB voltage divider network.
摘要翻译： 数模转换器（DAC）集成了一种新颖的基极电压输出DAC，可在消耗低功耗的同时提供高倍增带宽，并需要较小的硅面积。 高阶数字输入位（MSBS）从第一个电阻分压器DAC网络中选择一个电压范围（VMSB）。 然后将VMSB应用于小型高速低功耗差分输入单端输出LSB可编程衰减放大器的输入。 晶体管跟随器件有效地将MSB部分缓冲到LSB部分，并增加了带宽和运行速度，并允许单个精度MSB分压器网络的多通道共享。
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公开(公告)号：US5592167A
公开(公告)日：1997-01-07
申请号：US325716
申请日：1994-10-19
申请人： John M. Caruso , Quoi V. Huynh , Roger A. Levinson
发明人： John M. Caruso , Quoi V. Huynh , Roger A. Levinson
CPC分类号： H03M1/1028 , H03M1/365
摘要： A current driven span voltage source for use in an analog to digital converter includes a zero reference resistor serially connected with a resistor ladder. A first current source selectively passes a part of a first current through the resistor ladder to establish a span (gain) voltage range, and a second current source selectively passes a part of a second current through the zero reference resistor to establish a zero reference voltage for the span voltage range. The controlled current sources increase speed, reduce power and thermal noise, and improve temperature related performance as compared with voltage driven span and reference sources using operational amplifiers.
摘要翻译： 用于模数转换器的电流驱动跨接电压源包括与电阻梯级串联连接的零参考电阻。 第一电流源选择性地使第一电流的一部分通过电阻梯以建立跨度（增益）电压范围，并且第二电流源选择性地使一部分第二电流通过零参考电阻器以建立零参考电压 对于跨度电压范围。 与使用运算放大器的电压驱动量程和参考源相比，受控电流源可提高速度，降低功耗和热噪声，并提高温度相关性能。
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公开(公告)号：US5294927A
公开(公告)日：1994-03-15
申请号：US868070
申请日：1992-04-13
申请人： Roger A. Levinson , John M. Caruso , Ali Tasdighi
发明人： Roger A. Levinson , John M. Caruso , Ali Tasdighi
摘要： A digital to analog converter employs an operational amplifier as an active summing device for summing a first analog voltage corresponding to most significant bits of a digital value and a second analog voltage corresponding to least significant bits of the digital value. In a multi-channel application, a single MSB DAC can be shared by all channels through first MUXs in each channel with each channel having an independent LSB DAC. Alternatively, a single LSB DAC can be shared by all channels through second MUXs in each channel. Gain of the voltage summing operational amplifier in each channel is determined by values of a resistor connecting the output of the LSB DAC to the inverting negative input of the operational amplifier and of a feedback resistor connecting the amplifier output to the inverting negative input.
摘要翻译： 数模转换器采用运算放大器作为有源求和装置，用于将对应于数字值的最高有效位的第一模拟电压与对应于数字值的最低有效位的第二模拟电压相加。 在多通道应用中，单个MSB DAC可以通过每个通道中的第一个MUX通过所有通道共享，每个通道具有独立的LSB DAC。 或者，单个LSB DAC可以通过每个通道中的第二MUX由所有通道共享。 每个通道中电压求和运算放大器的增益由连接LSB DAC的输出到运算放大器的反相负输入的电阻值以及将放大器输出连接到反相负输入的反馈电阻决定。
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4.发明申请Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology 失效用于屏蔽隧道电路和浮栅的方法和装置，用于在通用CMOS技术中集成浮栅参考电压公开(公告)号：US20080044973A1
公开(公告)日：2008-02-21
申请号：US11639658
申请日：2006-12-14
IPC分类号： H01L21/336
CPC分类号： G11C27/005 , G11C16/3418 , H01L27/115 , H01L27/11521 , H01L27/11558 , H01L29/7883
摘要： A method and corresponding structure for shielding a floating gate tunneling element. The method comprises disposing a floating gate over a gate oxide using standard CMOS processing in two active areas defined by first and second doped well regions formed in a substrate surrounded by field oxide, and forming a floating gate shield layer so as to enclose the floating gate. The floating gate includes a first floating gate portion over an active area in the first doped well region and a second floating gate portion over the active area in the second doped well region. The first floating gate portion is substantially smaller than the second floating gate portion so as to enable adequate voltage coupling for Fowler-Nordheim tunneling to occur between the first doped well region and the first floating gate portion. The direction of tunneling is determined by high voltage application to one of the doped well regions.
摘要翻译： 一种用于屏蔽浮动栅极隧道元件的方法和相应的结构。 该方法包括使用在由场氧化物包围的衬底中形成的第一和第二掺杂阱区域限定的两个有源区域中的标准CMOS处理在栅极氧化物上设置浮置栅极，以及形成浮置栅极屏蔽层以便包围浮置栅极 。 浮置栅极包括在第一掺杂阱区域中的有源区域上的第一浮动栅极部分和位于第二掺杂阱区域中的有源区域上的第二浮动栅极部分。 第一浮栅部分基本上小于第二浮栅部分，以便能够在第一掺杂阱区域和第一浮栅部分之间产生用于Fowler-Nordheim隧道的足够的电压耦合。 通过高压施加到掺杂阱区之一来确定隧道的方向。
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公开(公告)号：US20110187570A1
公开(公告)日：2011-08-04
申请号：US13081918
申请日：2011-04-07
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/02
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
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公开(公告)号：US08779956B2
公开(公告)日：2014-07-15
申请号：US13305607
申请日：2011-11-28
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
摘要： A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
摘要翻译： Σ-Δ转换器可以包括耦合到第一求和电路和第二求和电路的滤波器。 多位量化器可以耦合到第二求和电路。 可以包括定义多位量化器和第一求和电路之间的反馈路径的单位数模转换器（DAC）。 可以包括限定第一求和电路和第二求和电路之间的前馈路径的前馈系数电路。
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公开(公告)号：US20100321221A1
公开(公告)日：2010-12-23
申请号：US12870135
申请日：2010-08-27
申请人： Giri NK. Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK. Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/04
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
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公开(公告)号：US20080150777A1
公开(公告)日：2008-06-26
申请号：US11999256
申请日：2007-12-03
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/00
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
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公开(公告)号：US20120194370A1
公开(公告)日：2012-08-02
申请号：US13305607
申请日：2011-11-28
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/00
摘要： A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
摘要翻译： Σ-Δ转换器可以包括耦合到第一求和电路和第二求和电路的滤波器。 多位量化器可以耦合到第二求和电路。 可以包括定义多位量化器和第一求和电路之间的反馈路径的单位数模转换器（DAC）。 可以包括限定第一求和电路和第二求和电路之间的前馈路径的前馈系数电路。
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10.发明授权Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology 失效用于屏蔽隧道电路和浮栅的方法和装置，用于在通用CMOS技术中集成浮栅参考电压公开(公告)号：US07759727B2
公开(公告)日：2010-07-20
申请号：US11639658
申请日：2006-12-14
IPC分类号： G11C16/04
CPC分类号： G11C27/005 , G11C16/3418 , H01L27/115 , H01L27/11521 , H01L27/11558 , H01L29/7883
摘要： A method and corresponding structure for shielding a floating gate tunneling element. The method comprises disposing a floating gate over a gate oxide using standard CMOS processing in two active areas defined by first and second doped well regions formed in a substrate surrounded by field oxide, and forming a floating gate shield layer so as to enclose the floating gate. The floating gate includes a first floating gate portion over an active area in the first doped well region and a second floating gate portion over the active area in the second doped well region. The first floating gate portion is substantially smaller than the second floating gate portion so as to enable adequate voltage coupling for Fowler-Nordheim tunneling to occur between the first doped well region and the first floating gate portion. The direction of tunneling is determined by high voltage application to one of the doped well regions.
摘要翻译： 一种用于屏蔽浮动栅极隧道元件的方法和相应的结构。 该方法包括使用在由场氧化物包围的衬底中形成的第一和第二掺杂阱区域限定的两个有源区域中的标准CMOS处理在栅极氧化物上设置浮置栅极，以及形成浮置栅极屏蔽层以便包围浮置栅极 。 浮置栅极包括在第一掺杂阱区域中的有源区域上的第一浮动栅极部分和位于第二掺杂阱区域中的有源区域上的第二浮动栅极部分。 第一浮栅部分基本上小于第二浮栅部分，以便能够在第一掺杂阱区域和第一浮栅部分之间产生用于Fowler-Nordheim隧道的足够的电压耦合。 通过高压施加到掺杂阱区之一来确定隧道的方向。
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