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    Flash memory device capable of preventing program disturb and method for programming the same
    4.
    发明授权
    Flash memory device capable of preventing program disturb and method for programming the same 有权
    能够防止程序干扰的闪存装置及其编程方法

    公开(公告)号：US06469933B2

    公开(公告)日：2002-10-22

    申请号：US09952628

    申请日：2001-09-13

    申请人： Sun-Mi Choi ,  Yeong-Taek Lee ,  Young-Ho Lim

    发明人： Sun-Mi Choi ,  Yeong-Taek Lee ,  Young-Ho Lim

    IPC分类号： G11C1604

    CPC分类号： G11C16/3427 ,  G11C16/10 ,  G11C16/12

    摘要： Disclosed is a method for programming a non-volatile semiconductor memory device that avoids the program disturb problem. In the programming method, ground voltage is applied to a first bit line corresponding to a memory cell to be programmed, and power supply voltage is applied to a second bit line corresponding to a memory cell to be prevented from being programmed. Next, a program voltage is applied to a word line connected to the memory cell to be programmed. The program voltage is stepped up to a desired voltage level of each program cycle from the first voltage thereby to reduce coupling between selected and non-selected bit and word lines.

    摘要翻译： 公开了一种用于编程避免程序干扰问题的非易失性半导体存储器件的方法。 在编程方法中，将接地电压施加到与待编程的存储单元相对应的第一位线，并且将电源电压施加到对应于存储器单元的第二位线以防止被编程。 接下来，将编程电压施加到连接到要编程的存储器单元的字线。 编程电压从第一电压升高到每个编程周期的期望电压电平，从而减少选定位和未选择位和字线之间的耦合。

    Method for optimizing distribution profile of cell threshold voltages in NAND-type flash memory device
    5.
    发明授权
    Method for optimizing distribution profile of cell threshold voltages in NAND-type flash memory device 有权
    用于优化NAND型闪存器件中单元阈值电压分布特性的方法

    公开(公告)号：US06594178B2

    公开(公告)日：2003-07-15

    申请号：US09872366

    申请日：2001-05-31

    申请人： Sun-Mi Choi ,  Yeong-Taek Lee

    发明人： Sun-Mi Choi ,  Yeong-Taek Lee

    IPC分类号： G11C1604

    CPC分类号： G11C16/3409 ,  G11C16/0483 ,  G11C16/30 ,  G11C16/3404

    摘要： A method is operable in a non-volatile memory device of a type having a plurality of blocks formed of a plurality of memory strings in which a plurality of memory cells are connected in series in which a programming operation is conducted after erasing memory cells. The method essentially including the steps of: erasing data held in the memory cells in a unit of the block; and applying a soft program voltage to word lines coupled with the erased memory cells in the unit of the block. The method improves a threshold voltage profile after an erasing cycle, whereby program stress can be minimized in a follow-up program operation.

    摘要翻译： 一种方法可操作在具有由多个存储器串形成的多个块的类型的非易失性存储器件中，其中多个存储器单元串联连接，其中在擦除存储器单元之后进行编程操作。 该方法基本上包括以下步骤：以块为单位擦除保存在存储单元中的数据; 以及将软编程电压施加到以块为单位与擦除的存储器单元耦合的字线。 该方法改善了擦除周期之后的阈值电压分布，从而可以在后续程序操作中使程序应力最小化。

    Nonvolatile semiconductor memory device having selective multiple-speed operation mode
    6.
    发明授权
    Nonvolatile semiconductor memory device having selective multiple-speed operation mode 有权
    具有选择性多速操作模式的非易失性半导体存储器件

    公开(公告)号：US06724682B2

    公开(公告)日：2004-04-20

    申请号：US10150387

    申请日：2002-05-17

    申请人： June Lee ,  Heung-Soo Im ,  Sun-Mi Choi

    发明人： June Lee ,  Heung-Soo Im ,  Sun-Mi Choi

    IPC分类号： G11C800

    CPC分类号： G11C16/08 ,  G11C8/12

    摘要： Disclosed is a nonvolatile semiconductor memory device having selective multiple-speed operation modes selected by simple options. The nonvolatile semiconductor memory device includes a memory cell array formed of a plurality of cell array blocks each having a plurality of cell strings, the cell string formed with floating gate memory cell transistors such that their control gates each are respectively connected to a plurality of word lines, and its drain-source channels are series connected to each other between a string select transistor and a ground select transistor. The memory device also includes a multiple-speed mode option part for generating a multiple-speed option signal, and an addressing circuit for selecting a page size and block size of the memory cell array different from one another in response to a state of the multiple-speed option signal.

    摘要翻译： 公开了具有通过简单选项选择的选择性多速操作模式的非易失性半导体存储器件。 非易失性半导体存储器件包括由多个单元阵列块形成的存储单元阵列，每个单元阵列块具有多个单元串，该单元串形成有浮动栅极存储单元晶体管，使得它们的控制栅各自分别连接到多个单词 线路及其漏极 - 源极通道在串选择晶体管和接地选择晶体管之间串联连接。 存储装置还包括用于产生多速选择信号的多速模式选择部分，以及用于响应多个状态的状态来选择彼此不同的存储单元阵列的页面大小和块大小的寻址电路 速度选项信号。

    DISPOSABLE STERILIZED CUPPING THERAPY APPARATUS
    7.
    发明申请
    DISPOSABLE STERILIZED CUPPING THERAPY APPARATUS 有权
    可拆卸灭菌的联合治疗装置

    公开(公告)号：US20120089066A1

    公开(公告)日：2012-04-12

    申请号：US13377874

    申请日：2010-04-09

    申请人： SangHun Lee ,  Sun-Mi Choi ,  HeeJung Kang

    发明人： SangHun Lee ,  Sun-Mi Choi ,  HeeJung Kang

    IPC分类号： A61F13/00 ,  A61H7/00

    CPC分类号： A61M1/08 ,  A61F13/00 ,  A61F13/14 ,  A61F13/141 ,  A61F13/15 ,  A61F15/00 ,  A61F15/004 ,  A61F15/008 ,  A61H1/00 ,  A61H1/008 ,  A61H7/00 ,  A61H9/00 ,  A61H9/005 ,  A61H9/0057 ,  A61M1/00 ,  A61M1/0001 ,  A61M1/0023 ,  A61M1/009 ,  A61M27/00

    摘要： According to the present invention, a disposable sterilized cupping therapy apparatus comprises: an expansion part consisting of a foldable material, the inner volume of which corresponds to the inner volume of a cupping therapy device when expanded; and a resilient coupling part configured on a perimeter of the expansion part, wherein the expansion part is arranged within the cupping therapy device, the coupling part is resiliently pressed against and coupled to a bottom of the cupping therapy device, and the skin of a person receiving therapy that is within the cupping therapy device is sealed from the air outside the expansion part by means of the latter.

    摘要翻译： 根据本发明，一次灭菌拔罐治疗装置包括：膨胀部，由可折叠材料构成，其内部体积对应于拔罐治疗装置的内部容积; 以及弹性联接部件，其构造在所述膨胀部件的周边上，其中所述膨胀部件布置在所述拔罐治疗装置内，所述联接部件被弹性地压靠并联接到所述拔罐治疗装置的底部，并且人的皮肤 在拔罐治疗装置内的接受治疗通过后者从膨胀部分外部的空气密封。