公开(公告)号：US20060273431A1

公开(公告)日：2006-12-07

申请号：US11144576

申请日：2005-06-03

申请人： Jun He ,  Kevin Fischer ,  Ying Zhou ,  Peter Moon

发明人： Jun He ,  Kevin Fischer ,  Ying Zhou ,  Peter Moon

IPC分类号： H01L23/52 ,  H01L21/469

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

公开(公告)号：US20120007242A1

公开(公告)日：2012-01-12

申请号：US13242988

申请日：2011-09-23

申请人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

发明人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

IPC分类号： H01L23/48

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

摘要翻译： 制造用于微电子器件的封盖互连的方法，其包括封盖层和互连件之间的任何间隙的密封特征以及由其形成的结构。 密封特征改善了互连的封装，其基本上减少或防止导电材料从封盖互连件的电迁移和/或扩散。

公开(公告)号：US20060220197A1

公开(公告)日：2006-10-05

申请号：US11081187

申请日：2005-03-16

申请人： Mauro Kobrinsky ,  Jun He ,  Kevin O'Brien ,  Patrick Morrow ,  Ying Zhou ,  Shriram Ramanathan

发明人： Mauro Kobrinsky ,  Jun He ,  Kevin O'Brien ,  Patrick Morrow ,  Ying Zhou ,  Shriram Ramanathan

IPC分类号： H01L23/02

CPC分类号： H01L21/76867 ,  B23K35/302 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76888 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05547 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/48 ,  H01L2924/013

摘要： A method of forming self-passivating interconnects. At least one of two mating bond structures is formed, at least in part, from an alloy of a first metal and a second metal (or other element). The second metal is capable of migrating through the first metal to free surfaces of the mating bond structures. During bonding, the two mating bond structures are bonded together to form an interconnect, and the second metal segregates to free surfaces of this interconnect to form a passivation layer. Other embodiments are described and claimed.

摘要翻译： 一种形成自钝化互连的方法。 至少部分地由第一金属和第二金属（或其它元素）的合金形成两个匹配结合结构中的至少一个。 第二金属能够通过第一金属迁移到配合结合结构的自由表面。 在接合期间，两个配对结合结构结合在一起以形成互连，并且第二金属分离到该互连的自由表面以形成钝化层。 描述和要求保护其他实施例。

公开(公告)号：US07402519B2

公开(公告)日：2008-07-22

申请号：US11144576

申请日：2005-06-03

申请人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

发明人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

IPC分类号： H01L21/44

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

摘要翻译： 制造用于微电子器件的封盖互连的方法，其包括封盖层和互连件之间的任何间隙的密封特征以及由其形成的结构。 密封特征改善了互连的封装，其基本上减少或防止导电材料从封盖互连件的电迁移和/或扩散。

公开(公告)号：US07402509B2

公开(公告)日：2008-07-22

申请号：US11081187

申请日：2005-03-16

申请人： Mauro J. Kobrinsky ,  Jun He ,  Kevin O'Brien ,  Patrick Morrow ,  Ying Zhou ,  Shriram Ramanathan

发明人： Mauro J. Kobrinsky ,  Jun He ,  Kevin O'Brien ,  Patrick Morrow ,  Ying Zhou ,  Shriram Ramanathan

IPC分类号： H01L23/52 ,  H01L21/44

CPC分类号： H01L21/76867 ,  B23K35/302 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76888 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05547 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/48 ,  H01L2924/013

摘要： A method of forming self-passivating interconnects. At least one of two mating bond structures is formed, at least in part, from an alloy of a first metal and a second metal (or other element). The second metal is capable of migrating through the first metal to free surfaces of the mating bond structures. During bonding, the two mating bond structures are bonded together to form an interconnect, and the second metal segregates to free surfaces of this interconnect to form a passivation layer. Other embodiments are described and claimed.

摘要翻译： 一种形成自钝化互连的方法。 至少部分地由第一金属和第二金属（或其它元素）的合金形成两个匹配结合结构中的至少一个。 第二金属能够通过第一金属迁移到配合结合结构的自由表面。 在接合期间，两个配对结合结构结合在一起以形成互连，并且第二金属分离到该互连的自由表面以形成钝化层。 描述和要求保护其他实施例。

公开(公告)号：US08928125B2

公开(公告)日：2015-01-06

申请号：US13242988

申请日：2011-09-23

申请人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

发明人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

IPC分类号： H01L23/48

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

摘要翻译： 制造用于微电子器件的封盖互连的方法，其包括封盖层和互连件之间的任何间隙的密封特征以及由其形成的结构。 密封特征改善了互连的封装，其基本上减少或防止导电材料从封盖互连件的电迁移和/或扩散。

公开(公告)号：US20080179748A1

公开(公告)日：2008-07-31

申请号：US12079683

申请日：2008-03-28

申请人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

发明人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

IPC分类号： H01L23/52

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

公开(公告)号：US08058710B2

公开(公告)日：2011-11-15

申请号：US12079683

申请日：2008-03-28

申请人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

发明人： Jun He ,  Kevin J. Fischer ,  Ying Zhou ,  Peter K. Moon

IPC分类号： H01L23/48

CPC分类号： H01L21/76849 ,  H01L21/0217 ,  H01L21/02252 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76888 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.

摘要翻译： 制造用于微电子器件的封盖互连的方法，其包括封盖层和互连件之间的任何间隙的密封特征以及由其形成的结构。 密封特征改善了互连的封装，其基本上减少或防止导电材料从封盖互连件的电迁移和/或扩散。

公开(公告)号：US20070238309A1

公开(公告)日：2007-10-11

申请号：US11394913

申请日：2006-03-31

申请人： Jun He ,  Kevin Fischer

发明人： Jun He ,  Kevin Fischer

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76843 ,  H01L21/76832 ,  H01L21/76849

摘要： A method is described of reducing the line to line capacitance within semiconductor devices and a device demonstrating the same. The device includes a spacer layer disposed between an etch stop material and a conductive layer. Separating the etch stop layer from the conductive layers by the spacer layer may decrease the line to line capacitance significantly in a semiconductor device.

摘要翻译： 描述了一种降低半导体器件内的线间电容的方法和展示其的器件。 该器件包括设置在蚀刻停止材料和导电层之间的间隔层。 通过间隔层将蚀刻停止层与导电层分离可以在半导体器件中显着地减小线对电容。

公开(公告)号：US20080203388A1

公开(公告)日：2008-08-28

申请号：US11712355

申请日：2007-02-28

申请人： Jun He ,  Jeff Hicks ,  Chris Litteken ,  Tom Marieb ,  Alan Lucero ,  Jose Maiz ,  Jun He ,  Jeffrey Morisson Hicks

发明人： Jun He ,  Jeff Hicks ,  Chris Litteken ,  Tom Marieb ,  Alan Lucero ,  Jose Maiz ,  Jun He ,  Jeffrey Morisson Hicks

IPC分类号： H01L23/58 ,  H01L21/66

CPC分类号： H01L22/32 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embodiments of the invention enable detection of edge damages in semiconductor devices. To this purpose, one or more continuity structures may be provided, where each structure comprises an undulating arrangement disposed between active circuits of the semiconductor device and a perimeter of the metallization layers. The continuity structure(s) forms one or more conductive paths intersecting a plurality of metallization layers in the semiconductor device. A relative change in an electrical characteristic of the continuity structure(s) is monitored to ascertain whether or not an edge damage is present.

摘要翻译： 本发明的实施例能够检测半导体器件中的边缘损伤。 为此，可以提供一个或多个连续性结构，其中每个结构包括布置在半导体器件的有源电路和金属化层的周边之间的起伏布置。 连续性结构形成与半导体器件中的多个金属化层交叉的一个或多个导电路径。 监视连续性结构的电特性的相对变化，以确定是否存在边缘损伤。