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    LIGHT-EMITTING DEVICE WITH POLARIZATION MODULATED LAST QUANTUM BARRIER
    1.
    发明申请
    LIGHT-EMITTING DEVICE WITH POLARIZATION MODULATED LAST QUANTUM BARRIER 有权

    公开(公告)号：US20220399476A1

    公开(公告)日：2022-12-15

    申请号：US17775042

    申请日：2020-11-16

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaohang LI ,  Zhiyuan LIU

    IPC: H01L33/32 ,  H01L33/06 ,  H01L33/00

    Abstract: A light-emitting device includes doped layer arranged on a substrate. The doped layer is n-doped or p-doped. A multiple quantum well is arranged on the doped layer and includes a plurality of adjacent pairs of quantum wells and quantum barriers. An electron blocking layer is arranged on the multiple quantum well. The doped layer, the electron blocking layer, the quantum wells, and all of the quantum barriers except for the last quantum barrier include a first III-nitride alloy. The last quantum barrier includes a second III-nitride alloy that is different from the first III-nitride alloy. The second III-nitride alloy has a bandgap larger than a bandgap of the last quantum well and smaller than a bandgap of the electron blocking layer. An interface between the last quantum barrier and the electron blocking layer exhibits a polarization difference between 0 and 0.012 C/m2.

    SEMICONDUCTOR DEVICES HAVING HETEROJUNCTIONS OF AN ALUMINUM GALLIUM NITRIDE TERNARY ALLOY LAYER AND A SECOND III NITRIDE TERNARY ALLOY LAYER
    2.
    发明申请
    SEMICONDUCTOR DEVICES HAVING HETEROJUNCTIONS OF AN ALUMINUM GALLIUM NITRIDE TERNARY ALLOY LAYER AND A SECOND III NITRIDE TERNARY ALLOY LAYER 审中-公开

    公开(公告)号：US20200234952A1

    公开(公告)日：2020-07-23

    申请号：US16839603

    申请日：2020-04-03

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaohang LI ,  Kaikai LIU

    IPC: H01L21/02 ,  H01L29/20 ,  H01L29/778

    Abstract: A method for forming a semiconductor device having a heterojunction of a first III-nitride ternary alloy layer arranged on a second III-nitride ternary alloy layer is provided. A range of concentrations of III-nitride elements for the first and second III-nitride ternary alloy layers is determined so that the absolute value of the polarization difference at the interface of the heterojunction of the first and second III-nitride ternary alloy layers is less than or equal to 0.007 C/m2 or greater than or equal to 0.04 C/m2. Specific concentrations of III-nitride elements for the first and second III-nitride ternary alloy layers are selected from the determined range of concentrations so that the absolute value of the polarization difference at the interface of the heterojunction of the first and second III-nitride ternary alloy layers is less than or equal to 0.007 C/m2 or greater than or equal to 0.04 C/m2. The semiconductor device is formed using the selected specific concentrations of III-nitride elements for the first and second III-nitride ternary alloy layers. The first and second III-nitride ternary alloy layers have a Wurtzite crystal structure. The first III-nitride ternary alloy layer is AlGaN and the second III-nitride ternary alloy layer is InGaN, InAlN, BAlN, or BGaN, or the first III-nitride ternary alloy layer is InGaN and the second III-nitride ternary alloy layer is AlGaN, InAlN, BAlN, or BGaN, or first III-nitride ternary alloy layer is InAlN and the second III-nitride ternary alloy layer is InGaN, AlGaN, BAlN, or BGaN, or the first III-nitride ternary alloy layer is BAlN and the second III-nitride ternary alloy layer is InGaN, InAlN, AlGaN, or BGaN, or first III-nitride ternary alloy layer is BGaN and the second III-nitride ternary alloy layer is InGaN, InAlN, BAlN, or AlGaN.

    AMBIPOLAR SEMICONDUCTOR-BASED TRANSISTOR AND METHOD
    4.
    发明申请
    AMBIPOLAR SEMICONDUCTOR-BASED TRANSISTOR AND METHOD 有权

    公开(公告)号：US20240379833A1

    公开(公告)日：2024-11-14

    申请号：US18691610

    申请日：2022-09-14

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaohang LI ,  Saravanan YUVARAJA

    IPC: H01L29/775 ,  H01L27/092 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

    Abstract: An ambipolar, gate all around, semiconductor-based transistor includes a substrate, a first-type channel structure located on the substrate, the first-type channel structure having a gate region, a source region, and a drain region, a second-type material located on all sides of the gate region of the first-type channel structure, but not on the source region and the drain region, a dielectric material fully surrounding the second-type material on all the external surface of the gate region, a gate electrode located on the dielectric material, a source electrode located on the source region, and a drain electrode located on the drain region. The first-type is one of p- or n-type and the second type is another of the p- or n-type.

    SEMICONDUCTOR DEVICE WITH A GROUP-III OXIDE ACTIVE LAYER
    5.
    发明申请
    SEMICONDUCTOR DEVICE WITH A GROUP-III OXIDE ACTIVE LAYER 有权

    公开(公告)号：US20220076950A1

    公开(公告)日：2022-03-10

    申请号：US17417788

    申请日：2020-01-14

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaohang LI ,  Che-Hao LIAO

    IPC: H01L21/02 ,  H01L29/24

    Abstract: A method for forming a semiconductor device with a group-III oxide active layer including at least two group-III materials is provided. A group-III oxide substrate is provided and a group-III oxide active layer including at least one group-III material on the group-III oxide substrate is formed on the group-III oxide substrate. A group-III material in the group-III oxide substrate is different from the at least one group-III material in the group-III oxide active layer. The group-III oxide active layer including at least one group-III material and the group-III oxide substrate are annealed at a temperature greater than or equal to 1,000° C. so that the group-III material in the group-III oxide substrate diffuses into the group-III oxide active layer to form the group-III oxide active layer including the at least two group-III materials.

    III-NITRIDE SEMICONUCTOR DEVICES HAVING A BORON NITRIDE ALLOY CONTACT LAYER AND METHOD OF PRODUCTION
    6.
    发明申请
    III-NITRIDE SEMICONUCTOR DEVICES HAVING A BORON NITRIDE ALLOY CONTACT LAYER AND METHOD OF PRODUCTION 审中-公开

    公开(公告)号：US20200274024A1

    公开(公告)日：2020-08-27

    申请号：US16652214

    申请日：2018-10-15

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Haiding SUN ,  Xiaohang LI

    IPC: H01L33/00 ,  H01L33/40 ,  H01L33/14 ,  H01L21/02 ,  H01L21/283 ,  H01L29/20 ,  H01L29/205

    Abstract: A method for forming a III-nitride semiconductor device involves determining work functions of a first III-nitride contact layer and a first metal contact. The determined work function of the first III-nitride contact layer is based on a group III element of the first III-nitride contact layer. Based on the determined work functions of the first III-nitride contact layer and of the first metal contact, it is determined that the work function of the first III-nitride contact layer should be adjusted. The III-nitride semiconductor device is formed including the first III-nitride contact layer adjacent to a second III-nitride contact layer, the first metal contact arranged on the first III-nitride contact layer, and a second metal contact arranged on the second III-nitride contact layer. The first III-nitride contact layer of the formed III-nitride semiconductor device is a boron nitride alloy having an amount of boron that adjusts the work function of the first III-nitride contact layer relative to the determined work function of the first metal layer based on the group III element of the first III-nitride contact layer.

    MULTILAYER METALENS
    9.
    发明申请
    MULTILAYER METALENS 有权

    公开(公告)号：US20220229207A1

    公开(公告)日：2022-07-21

    申请号：US17605382

    申请日：2020-04-20

    Applicant: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaohang LI ,  Ronghui LIN

    IPC: G02B1/00 ,  G02B27/42 ,  H01Q15/00

    Abstract: A multilayer metalens includes a substrate having first, second, and third axes that are perpendicular to each other. A first layer of antennas is arranged, relative to the third axis, on the substrate. Each antenna of the first layer of antennas is rotated relative to the first and second axes based on a position of each antenna of the first layer of antennas along the first and second axes. A second layer of antennas is arranged, in the third axis, on the first layer of antennas. Each antenna of the second layer of antennas is rotated relative to the first and second axes based on a position of each antenna of the second layer of antennas along the first and second axes. Each antenna in the first and second layers of antennas has, in a plane parallel to a top of the substrate an elongated shape. Each antenna in the first layer of antennas has a different rotation relative to the first and second axes than an antenna in the second layer of antennas that is located, relative to the third axis, adjacent to the respective antenna in the first layer of antennas.

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