公开(公告)号：US11728963B2

公开(公告)日：2023-08-15

申请号：US17382935

申请日：2021-07-22

Applicant: KIOXIA CORPORATION

Inventor： Hiroyuki Kobayashi

IPC: H04L7/033 ,  H03L7/08 ,  H03L7/091 ,  H04J14/02

CPC classification number: H04L7/033 ,  H03L7/0807 ,  H03L7/091 ,  H04J14/02

Abstract: A clock and data recovery device of a memory system receives a multiplexed data signal obtained by multiplexing a plurality of data units, each of which is to be transmitted to one of a plurality of memories for storage therein, in an area corresponding to each memory in an amplitude direction and a time direction. The clock and data recovery device includes a clock generation circuit configured to generate a clock, and a data recovery circuit configured to execute phase synchronization with respect to a synchronization signal included in the multiplexed data signal using the generated clock and to recover one of the data units from the area corresponding to one of the memories, from the multiplexed data signal.

公开(公告)号：US11334286B2

公开(公告)日：2022-05-17

申请号：US17098757

申请日：2020-11-16

Applicant: KIOXIA CORPORATION

Inventor： Hiroyuki Kobayashi ,  Jun Deguchi ,  Junji Wadatsumi ,  Takashi Toi

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/42 ,  H04L7/00 ,  H04L7/033

Abstract: A memory system includes first, second, third, and fourth nonvolatile memory, a memory controller configured to modulate write data for the first and second memory into a first time slot of a data signal according to an allocation scheme, and modulate write data for the third and fourth memory into a second time slot of the data signal according to the allocation scheme, a first bridge circuit configured according to the allocation scheme to extract first write data from the first time slot, a second bridge circuit configured according to the allocation scheme to extract second write data from the first time slot, a third bridge circuit configured according to the allocation scheme to extract third write data from the second time slot, and a fourth bridge circuit configured according to the allocation scheme to extract fourth write data from the second time slot.