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    Memory system and controlling method of performing rewrite operation at maximum rewrite speed
    3.
    发明授权
    Memory system and controlling method of performing rewrite operation at maximum rewrite speed 有权

    公开(公告)号：US11886335B2

    公开(公告)日：2024-01-30

    申请号：US17839301

    申请日：2022-06-13

    Applicant: Kioxia Corporation

    Inventor： Kazuya Kitsunai

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7202

    Abstract: According to one embodiment, a controller manages a first block set being a set of blocks in which a remaining time is a first time and a second block set being a set of blocks in which a remaining time is a second time. The controller calculates a first rewrite speed based on the first time and a number of blocks included in the first block set. The controller calculates a second rewriting speed based on the second time and a sum of the number of blocks included in the first block set and the number of blocks included in the second block set. The controller determines a maximum rewriting speed among the first rewrite speed and the second rewriting speed. The controller performs the rewrite operation at the determined maximum rewrite speed.

    Memory system and garbage collection control method
    6.
    发明授权
    Memory system and garbage collection control method 有权

    公开(公告)号：US11182287B2

    公开(公告)日：2021-11-23

    申请号：US16787133

    申请日：2020-02-11

    Applicant: Kioxia Corporation

    Inventor： Yoko Masuo ,  Yosuke Mitsumasu ,  Kazuya Kitsunai

    IPC: G06F12/02 ,  G06F3/06

    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes a plurality of blocks. The controller controls an operation of writing data to the nonvolatile memory and an operation of reading data to the nonvolatile memory. The controller includes a first processor and a second processor. The first processor executes a first process of creating one or more free blocks by transferring valid data in N blocks (where N is a natural number greater than or equal to two) to blocks of number less than N. The second processor executes a second process of transferring valid data including data which needs refresh in M blocks (where M is a natural number greater than or equal to one) to blocks of number less than or equal to M.

    Memory system and controlling method of memory system
    8.
    发明授权
    Memory system and controlling method of memory system 有权

    公开(公告)号：US11645001B2

    公开(公告)日：2023-05-09

    申请号：US17147519

    申请日：2021-01-13

    Applicant: Kioxia Corporation

    Inventor： Chihoko Shigeta ,  Kazuya Kitsunai

    IPC: G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

    Abstract: According to one embodiment, a memory system includes a first and second nonvolatile memory each including a plurality of memory cells; and a memory controller configured to perform, in parallel, a first set of write processes sequentially performed on the first nonvolatile memory, and a second set of write processes sequentially performed on the second nonvolatile memory. The memory controller is configured to change a setting of at least one unperformed write process among the first set and second set of write processes based on differences in progress between the first set and second set of write processes, the first set and second set of write processes being performed in parallel.

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