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1.发明公开公开(公告)号：US20240005999A1
公开(公告)日：2024-01-04
申请号：US18467793
申请日：2023-09-15
Applicant: KIOXIA CORPORATION
Inventor： Yasuhiro SHIINO , Eietsu TAKAHASHI , Koki UENO
CPC classification number: G11C16/26 , G11C11/5628 , G11C16/0483 , G11C16/3427 , G11C16/349 , G11C16/08 , G11C16/10 , G11C16/14
Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
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2.发明公开公开(公告)号：US20230197167A1
公开(公告)日：2023-06-22
申请号：US18173211
申请日：2023-02-23
Applicant: KIOXIA CORPORATION
Inventor： Yasuhiro SHIINO , Eietsu TAKAHASHI , Koki UENO
CPC classification number: G11C16/26 , G11C11/5628 , G11C16/0483 , G11C16/3427 , G11C16/349 , G11C16/08 , G11C16/10 , G11C16/14
Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
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3.发明公开公开(公告)号：US20240347113A1
公开(公告)日：2024-10-17
申请号：US18752870
申请日：2024-06-25
Applicant: KIOXIA CORPORATION
Inventor： Yasuhiro SHIINO , Eietsu TAKAHASHI , Koki UENO
CPC classification number: G11C16/26 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/3427 , G11C16/349
Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
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