公开(公告)号：US12136458B2

公开(公告)日：2024-11-05

申请号：US17897089

申请日：2022-08-26

Applicant: KIOXIA CORPORATION

Inventor： Tomoki Nakagawa ,  Koji Kato ,  Shuhei Oketa ,  Mai Shimizu

IPC: G11C7/10 ,  G11C16/04 ,  G11C16/08

Abstract: A semiconductor memory device includes a memory string, a voltage supply circuit, a plurality of control signal lines, a row decoder, and a control circuit. The voltage supply circuit is configured to generate a plurality of operation voltages to operate the semiconductor memory device. The operation voltages include a negative voltage. The plurality of control signal lines is connected between the voltage supply circuit and the memory string. The row decoder includes a plurality of transistors provided in the plurality of control signal lines, respectively. The control circuit is configured to control the transistors of the row decoder, and cause the negative voltage to be supplied to the row decoder during a certain period of time in which a voltage of one of the control signal lines drops to a negative level.

公开(公告)号：US12106808B2

公开(公告)日：2024-10-01

申请号：US18485630

申请日：2023-10-12

Applicant: Kioxia Corporation

Inventor： Mai Shimizu ,  Koji Kato ,  Yoshihiko Kamata ,  Mario Sako

IPC: G11C16/08 ,  G11C11/56 ,  G11C16/04 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30 ,  G11C16/32 ,  G11C16/34

CPC classification number: G11C16/08 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30 ,  G11C16/32 ,  G11C16/3427

Abstract: A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line.

公开(公告)号：US11600328B2

公开(公告)日：2023-03-07

申请号：US17591216

申请日：2022-02-02

Applicant: KIOXIA CORPORATION

Inventor： Mai Shimizu ,  Koji Kato ,  Yoshihiko Kamata ,  Mario Sako

IPC: G11C16/08 ,  G11C16/30 ,  G11C16/26 ,  G11C16/04 ,  G11C11/56 ,  G11C16/24 ,  G11C16/32 ,  G11C16/34

Abstract: A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line.

公开(公告)号：US11276466B2

公开(公告)日：2022-03-15

申请号：US16952858

申请日：2020-11-19

Applicant: KIOXIA CORPORATION

Inventor： Mai Shimizu ,  Koji Kato ,  Yoshihiko Kamata ,  Mario Sako

IPC: G11C16/08 ,  G11C16/30 ,  G11C16/26 ,  G11C16/04 ,  G11C11/56 ,  G11C16/24 ,  G11C16/32 ,  G11C16/34

Abstract: A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line.

公开(公告)号：US11862248B2

公开(公告)日：2024-01-02

申请号：US18161274

申请日：2023-01-30

Applicant: Kioxia Corporation

Inventor： Mai Shimizu ,  Koji Kato ,  Yoshihiko Kamata ,  Mario Sako

IPC: G11C16/08 ,  G11C16/30 ,  G11C16/26 ,  G11C16/04 ,  G11C11/56 ,  G11C16/24 ,  G11C16/32 ,  G11C16/34

CPC classification number: G11C16/08 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30 ,  G11C16/32 ,  G11C16/3427

Abstract: A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line.

公开(公告)号：US20220157380A1

公开(公告)日：2022-05-19

申请号：US17591216

申请日：2022-02-02

Applicant: KIOXIA CORPORATION

Inventor： Mai Shimizu ,  Koji Kato ,  Yoshihiko Kamata ,  Mario Sako

IPC: G11C16/08 ,  G11C16/30 ,  G11C16/26 ,  G11C16/04 ,  G11C11/56 ,  G11C16/24 ,  G11C16/32 ,  G11C16/34

Abstract: A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line.