Method to exploit superword-level parallelism using semi-isomorphic packing
    3.
    发明授权
    Method to exploit superword-level parallelism using semi-isomorphic packing 失效
    利用半同构包装开发超级平行度的方法

    公开(公告)号:US08136105B2

    公开(公告)日:2012-03-13

    申请号:US11536990

    申请日:2006-09-29

    IPC分类号: G06F9/45

    CPC分类号: G06F8/456

    摘要: A computer program product is provided for extracting SIMD parallelism. The computer program product includes instructions for providing a stream of input code comprising basic blocks; identifying pairs of statements that are semi-isomorphic with respect to each other within a basic block; iteratively combining into packs, pairs of statements that are semi-isomorphic with respect to each other, and combining packs into combined packs; collecting packs whose statements can be scheduled together for processing; and generating SIMD instructions for each pack to provide for extracting the SIMD parallelism..

    摘要翻译: 提供了一种用于提取SIMD并行性的计算机程序产品。 计算机程序产品包括用于提供包括基本块的输入代码流的指令; 识别在基本块内相对于彼此半同构的语句对; 迭代地组合成包,相对于半同构的语句对,以及将包合并成组合包; 收集包,其陈述可以一起安排处理; 并为每个包生成SIMD指令以提供SIMD并行性。

    SETJMP/LONGJMP FOR SPECULATIVE EXECUTION FRAMEWORKS
    4.
    发明申请
    SETJMP/LONGJMP FOR SPECULATIVE EXECUTION FRAMEWORKS 失效
    用于统一执行框架的SETJMP / LONGJMP

    公开(公告)号:US20110289303A1

    公开(公告)日:2011-11-24

    申请号:US13026702

    申请日:2011-02-14

    IPC分类号: G06F9/312

    摘要: A process for check pointing in speculative execution frameworks, identifies calls to a set of setjmp/longjmp instructions to form identified calls to setjmp/longjmp, determines a control flow path between a call to a setjmp and a longjmp pair of instructions in the identified calls to setjmp/longjmp and replaces calls to the setjmp/longjmp pair of instructions with calls to an improved_setjmp and improved_longjmp instruction pair. The process creates a context data structure in memory, computes a non-volatile save/restore set and replaces the call to improved_setjmp of the setjmp/longjmp pair of instructions with instructions to save all required non-volatile and special purpose registers and replaces a call to improved_longjmp of the setjmp/longjmp pair of instructions with instructions to restore all required non-volatile and special purpose registers and to branch to an instruction immediately following a block of code containing the call to improved_setjmp.

    摘要翻译: 用于检查指向推测执行框架的过程,识别对一组setjmp / longjmp指令的调用以形成对setjmp / longjmp的标识的调用,确定在所识别的呼叫中对setjmp的调用和longjmp指令之间的控制流路径 到setjmp / longjmp,并且通过调用一个improved_setjmp和improved_longjmp指令对来替换对setjmp / longjmp指令对的调用。 该过程在内存中创建一个上下文数据结构,计算一个非易失性存储/恢复集,并用setjmp / longjmp指令对来替换一个改进_setjmp的调用,其中包含所有需要的非易失性和特殊用途寄存器的指令,并替换一个调用 到具有用于恢复所有需要的非易失性和特殊目的寄存器的指令的setjmp / longjmp指令指令的改进_longjmp,并且分支到紧跟在包含对converted_setjmp的调用的代码块之后的指令。

    SIMD code generation in the presence of optimized misaligned data reorganization
    5.
    发明授权
    SIMD code generation in the presence of optimized misaligned data reorganization 失效
    存在优化的未对齐数据重组的SIMD代码生成

    公开(公告)号:US07478377B2

    公开(公告)日:2009-01-13

    申请号:US10918996

    申请日:2004-08-16

    IPC分类号: G06F9/45

    CPC分类号: G06F8/4452 G06F8/447

    摘要: Generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop operates on datatypes having different lengths, is disclosed. Further, a preferred embodiment of the present invention includes a novel techique to efficiently realign or shift arbitrary streams to an arbitrary offset, regardless whether the alignments or offsets are known at the compile time or not. This technique enables the application of advanced alignment optimizations to runtime alignment. This allows sequential loop code operating on datatypes of disparate length to be transformed (“simdized”) into optimized SIMD code through a fully automated process.

    摘要翻译: 公开了在单指令多数据路径(SIMD)架构中生成循环码,其循环对具有不同长度的数据类型进行操作。 此外,本发明的优选实施例包括一种用于有效地将任意流重新对准或将任意流移动到任意偏移的新技术,无论在编译时是否知道对准或偏移。 这种技术使得可以将高级对齐优化应用于运行时对齐。 这允许对具有不同长度的数据类型的顺序循环代码通过完全自动化的过程进行转换(“模拟化”)成优化的SIMD代码。

    Framework for efficient code generation using loop peeling for SIMD loop code with multiple misaligned statements
    6.
    发明授权
    Framework for efficient code generation using loop peeling for SIMD loop code with multiple misaligned statements 失效
    使用循环剥离的高效代码生成框架,用于具有多个不对齐语句的SIMD循环代码

    公开(公告)号:US07395531B2

    公开(公告)日:2008-07-01

    申请号:US10918879

    申请日:2004-08-16

    IPC分类号: G06F9/45 G06F15/00

    CPC分类号: G06F8/447 G06F8/4441

    摘要: A system and method is provided for vectorizing misaligned references in compiled code for SIMD architectures that support only aligned loads and stores. In this framework, a loop is first simdized as if the memory unit imposes no alignment constraints. The compiler then inserts data reorganization operations to satisfy the actual alignment requirements of the hardware. Finally, the code generation algorithm generates SIMD codes based on the data reorganization graph, addressing realistic issues such as runtime alignments, unknown loop bounds, residual iteration counts, and multiple statements with arbitrary alignment combinations. Loop peeling is used to reduce the computational overhead associated with misaligned data. A loop prologue and epilogue are peeled from individual iterations in the simdized loop, and vector-splicing instructions are applied to the peeled iterations, while the steady-state loop body incurs no additional computational overhead.

    摘要翻译: 提供了一种系统和方法,用于在仅支持对齐的负载和存储的SIMD架构的编译代码中向量化未对齐的引用。 在这个框架中,循环首先被模拟,就好像内存单元没有对齐约束。 编译器然后插入数据重组操作以满足硬件的实际对齐要求。 最后,代码生成算法基于数据重组图生成SIMD代码,解决诸如运行时对齐,未知循环边界,残差迭代计数以及具有任意对齐组合的多个语句之类的现实问题。 循环剥离用于减少与未对齐数据相关的计算开销。 循环序言和结语在模拟循环中从单独迭代中去除,向量拼接指令被应用于剥离的迭代,而稳态循环体不引起额外的计算开销。

    Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization
    7.
    发明授权
    Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization 失效
    用于SIMD向量化的连续存储器访问的集成的内部和组间集成的框架

    公开(公告)号:US07367026B2

    公开(公告)日:2008-04-29

    申请号:US10919115

    申请日:2004-08-16

    IPC分类号: G06F9/45 G06F15/00 G06F7/52

    CPC分类号: G06F8/4452 G06F8/445

    摘要: A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous stream of memory is disclosed. A preferred embodiment identifies groups of isomorphic statements within a loop body where the isomorphic statements operate over a contiguous stream of memory over the iteration of the loop. Those identified statements are then converted into virtual-length vector operations. Next, the hardware's available vector length is used to determine a number of virtual-length vectors to aggregate into a single vector operation for each iteration of the loop. Finally, the aggregated, vectorized loop code is converted into SIMD operations.

    摘要翻译: 一种用于生成在单指令多数据路径(SIMD)架构上执行的循环码的方法,计算机程序产品和信息处理系统,其中循环包含在连续的存储器流上操作的多个非步进存储器访问 披露 优选实施例识别在循环体内同构语句的组,其中同构语句在循环的迭代上在连续的存储器流上操作。 然后将那些识别的语句转换为虚拟长度向量操作。 接下来,使用硬件的可用向量长度来确定多个虚拟长度向量以聚合到单个向量操作中,用于循环的每次迭代。 最后,聚合的向量化循环码被转换成SIMD操作。

    Analyze and reduce number of data reordering operations in SIMD code
    10.
    发明授权
    Analyze and reduce number of data reordering operations in SIMD code 有权
    分析和减少SIMD代码中数据重排序的数量

    公开(公告)号:US08954943B2

    公开(公告)日:2015-02-10

    申请号:US11340452

    申请日:2006-01-26

    IPC分类号: G06F9/45 G06F15/00 G06F15/76

    CPC分类号: G06F8/443

    摘要: A method for analyzing data reordering operations in Single Issue Multiple Data source code and generating executable code therefrom is provided. Input is received. One or more data reordering operations in the input are identified and each data reordering operation in the input is abstracted into a corresponding virtual shuffle operation so that each virtual shuffle operation forms part of an expression tree. One or more virtual shuffle trees are collapsed by combining virtual shuffle operations within at least one of the one or more virtual shuffle trees to form one or more combined virtual shuffle operations, wherein each virtual shuffle tree is a subtree of the expression tree that only contains virtual shuffle operations. Then code is generated for the one or more combined virtual shuffle operations.

    摘要翻译: 提供了一种用于分析单发多数据源代码中的数据重排序操作并从中生成可执行代码的方法。 收到输入。 识别输入中的一个或多个数据重排序操作,并将输入中的每个数据重排序操作抽象为相应的虚拟随机播放操作,使得每个虚拟随机播放操作形成表达式树的一部分。 通过将所述一个或多个虚拟随机播放树中的至少一个中的虚拟随机播放操作组合以形成一个或多个组合的虚拟随机播放操作来折叠一个或多个虚拟洗牌树,其中每个虚拟随机播放树是仅包含表达式树的子树 虚拟随机操作。 然后为一个或多个组合的虚拟随机操作生成代码。